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Verification

Our Verification experts share insights that help you address the challenges of ensuring that your silicon designs will work as intended, from software bring-up through system validation.

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RTL Signoff vs. Functional Signoff: What’s the Difference?

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5 min read/Jul 01, 2025

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RTL Signoff vs. Functional Signoff: What’s the Difference?

By Bradley Geden, Manoz Palaparthi

Tags: Verification Central, Multi-Die System, RTL Synthesis, Static & Formal Verification, AI & Machine Learning, Debug, Physical Verification, Test, Simulation, Energy-Efficient SoCs, Signoff, Chip Design Insights, Design, Verification, Formal Verification

Software-Defined Vehicles: Agile Development with Cloud-Based Virtual Prototypes

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5 min read/Jun 10, 2025

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Software-Defined Vehicles: Agile Development with Cloud-Based Virtual Prototypes

By Gunnar Braun, Stewart Williams

Tags: Cloud, Insights, Chip Design Insights, Automotive, Cloud Insights, Verification, Virtual Prototyping

Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles

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5 min read/Jun 04, 2025

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Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles

By Tom De Schutter

Tags: Cloud, Chip Design Insights, Design, Verification IP, Automotive, Verification, Virtual Prototyping

High Bandwidth Memory (HBM) at the AI Crossroads: Customization or Standardization?

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3 min read/May 28, 2025

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High Bandwidth Memory (HBM) at the AI Crossroads: Customization or Standardization?

By Synopsys Editorial Staff

Tags: Verification Central, Multi-Die System, AI & Machine Learning, Memory, Chip Design Insights, Design, Interface IP, Verification IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design

Faster, More Collaborative SoC and Chiplet Architecture Exploration: Introducing Synopsys Platform Architect Development Kit (PADK)

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3 min read/May 22, 2025

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Faster, More Collaborative SoC and Chiplet Architecture Exploration: Introducing Synopsys Platform Architect Development Kit (PADK)

By Kamal Desai

Tags: Verification Central, Cloud, Multi-Die System, Prototyping, Chip Design Insights, Design, Verification, Virtual Prototyping

Driving the Future: Renesas R-Car Generation 5 Virtual Prototypes Enable Software Defined Vehicles

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5 min read/May 19, 2025

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Driving the Future: Renesas R-Car Generation 5 Virtual Prototypes Enable Software Defined Vehicles

By Sylvain Bayon De Noyer

Tags: Verification Central, Automotive, Verification, Virtual Prototyping

Skymizer Reduces Verification Cycles for AI Accelerator IP Development by 33% with Synopsys HAPS Prototyping

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4 min read/May 19, 2025

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Skymizer Reduces Verification Cycles for AI Accelerator IP Development by 33% with Synopsys HAPS Prototyping

By Simon Han

Tags: AI & Machine Learning, Physical Verification, Prototyping, Chip Design Insights, Design, Emulation, Verification

Turbocharging AI: How Hardware-Assisted Verification Fuels the Revolution

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6 min read/Apr 22, 2025

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Turbocharging AI: How Hardware-Assisted Verification Fuels the Revolution

By Dr. Johannes Stahl

Tags: Verification Central, AI & Machine Learning, Prototyping, Emulation, Verification

Using Synopsys VSO.ai to Accelerate Synopsys VIP and IP Coverage

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3 min read/Apr 04, 2025

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Using Synopsys VSO.ai to Accelerate Synopsys VIP and IP Coverage

By Taruna Reddy

Tags: AI & Machine Learning, Debug, Simulation, Verification IP, Verification

A Novel Approach to Speeding Up PCIe 6.0+ Designs - Compliance Load Board Verification

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6 min read/Mar 31, 2025

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A Novel Approach to Speeding Up PCIe 6.0+ Designs - Compliance Load Board Verification

By Deepak Kumar Lnu

Tags: Verification Central, AI & Machine Learning, Verification IP, HPC, Data Center, Verification

Transforming Edge Software Development with Arm-based Virtual Prototyping

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3 min read/Mar 09, 2025

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Transforming Edge Software Development with Arm-based Virtual Prototyping

By Malte Doerper

Tags: Cloud, Product Spotlight, Prototyping, Chip Design Insights, Design, Verification, Virtual Prototyping

Industry's First Verification IP for Display Port Automotive Extensions (DP AE)

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3 min read/Feb 28, 2025

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Industry's First Verification IP for Display Port Automotive Extensions (DP AE)

By Meenakshy Ramachandran

Tags: Verification IP, Automotive, Verification

Synopsys HAPS-200 and ZeBu-200 Expand the Industry’s Highest Performance Hardware-Assisted Verification Portfolio

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5 min read/Feb 13, 2025

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Synopsys HAPS-200 and ZeBu-200 Expand the Industry’s Highest Performance Hardware-Assisted Verification Portfolio

By Frank Schirrmeister

Tags: Chip Design Insights, Simulation, Design, Emulation, Verification, Virtual Prototyping

Solving Systems Problems with DIY Silicon: How an ASU Researcher Became an Unwitting Chip Designer

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4 min read/Feb 13, 2025

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Solving Systems Problems with DIY Silicon: How an ASU Researcher Became an Unwitting Chip Designer

By Greg Sorber

Tags: Customer Spotlight, Prototyping, Chip Design Insights, Design, Emulation, Verification, Virtual Prototyping, Customer

Validation of AUTOSAR Classic ECUs Running Rust SWCs: A Safer Path to Automotive Software

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4 min read/Jan 27, 2025

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Validation of AUTOSAR Classic ECUs Running Rust SWCs: A Safer Path to Automotive Software

By Nicolas Amringer, Stefan Pruisken

Tags: Verification Central, Automotive, Verification, Virtual Prototyping

Hardware-Assisted Verification: Unlocking the Future of Chip and System Design

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4 min read/Oct 28, 2024

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Hardware-Assisted Verification: Unlocking the Future of Chip and System Design

By Frank Schirrmeister

Tags: Chip Design Insights, Emulation, Verification

Accelerating AI Chip Development and Reducing Risk with Pre-silicon, Secure, Cloud-based Emulation

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4 min read/Oct 21, 2024

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Accelerating AI Chip Development and Reducing Risk with Pre-silicon, Secure, Cloud-based Emulation

By Gerhard Scherer, Todd Koelling

Tags: Cloud, Product Spotlight, Chip Design Insights, Emulation, Verification

Industry First Verification IP for Arm AMBA DTI-G

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2 min read/Sep 12, 2024

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Industry First Verification IP for Arm AMBA DTI-G

By Gunjan Kumar Gupta

Tags: Verification Central, Data Center, Internet of Things, Verification IP, Automotive, Verification

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2 min read/Sep 10, 2024

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The Journey of Coverage Closure

By Taruna Reddy

Tags: Verification Central, AI & Machine Learning, Simulation, Verification

Reducing Manual Effort and Achieving Better Chip Verification Coverage with AI and Formal Techniques

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6 min read/Sep 04, 2024

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Reducing Manual Effort and Achieving Better Chip Verification Coverage with AI and Formal Techniques

By Taruna Reddy

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Verification

UCIe 2.0 - Setting the Tone for Chiplet Interoperability

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3 min read/Aug 08, 2024

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UCIe 2.0 - Setting the Tone for Chiplet Interoperability

By Prasad Subudhi K. S, Deepak Nagaria, Narasimha Babu G V L

Tags: Verification Central, Multi-Die System, Verification IP, Verification

Trillions of Cycles per Day: How SiFive Boosts IP and Software Validation with Synopsys HAPS Prototyping System

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4 min read/Jul 22, 2024

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Trillions of Cycles per Day: How SiFive Boosts IP and Software Validation with Synopsys HAPS Prototyping System

By António Costa

Tags: RISC-V, Prototyping, Chip Design Insights, Verification

How Synopsys is Enabling Pioneering South Korean Startup Rebellions to Redefine the World of Energy-efficient AI Computing

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4 min read/Jul 10, 2024

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How Synopsys is Enabling Pioneering South Korean Startup Rebellions to Redefine the World of Energy-efficient AI Computing

By Jinwook Oh, Dr. Johannes Stahl

Tags: Verification Central, AI & Machine Learning, Emulation, Verification, Virtual Prototyping

AutoSens Detroit 2024: Automotive EE Architectures - Quo Vadis

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7 min read/Jun 28, 2024

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AutoSens Detroit 2024: Automotive EE Architectures - Quo Vadis

By Frank Schirrmeister

Tags: Verification Central, Automotive, Verification

Accelerate RISC-V Verification Using Synopsys Cloud

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3 min read/Jun 26, 2024

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Accelerate RISC-V Verification Using Synopsys Cloud

By Anuj Pant

Tags: Verification Central, Cloud, Cloud Insights, Verification

The Dynamic Traceability Method: Revolutionizing Software Testing

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2 min read/Jun 26, 2024

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The Dynamic Traceability Method: Revolutionizing Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Synopsys SoC Verification Kit – Delivering Out-of-the-box SoC Verification Solution

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3 min read/Jun 18, 2024

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Synopsys SoC Verification Kit – Delivering Out-of-the-box SoC Verification Solution

By Varun Agrawal

Tags: AI & Machine Learning, Memory, Verification IP, Automotive, HPC, Data Center, Verification

Synopsys Ethernet 1.6T Verification IP and Protocol Solutions for Next-Generation Networking and Communication Systems

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4 min read/Jun 14, 2024

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Synopsys Ethernet 1.6T Verification IP and Protocol Solutions for Next-Generation Networking and Communication Systems

By Laxmi Narayan

Tags: Verification Central, Cloud, AI & Machine Learning, Emulation, Verification IP, HPC, Data Center, Verification

Verdi Waveform Utilities: Get More Done with Faster Runtime and Less Memory

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2 min read/Jun 13, 2024

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Verdi Waveform Utilities: Get More Done with Faster Runtime and Less Memory

By Lauren Wu, Robert Ruiz

Tags: Verification Central, Debug, Verification

Industry's First Verification IP for PCIe 7.0

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2 min read/Jun 13, 2024

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Industry's First Verification IP for PCIe 7.0

By Aditi Sharma

Tags: Verification Central, AI & Machine Learning, Verification IP, Verification

Streamlining Camera Security Validation Framework Using Synopsys MIPI CSE v2.0 VIP

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4 min read/May 23, 2024

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Streamlining Camera Security Validation Framework Using Synopsys MIPI CSE v2.0 VIP

By Andrew Elias, SriDeepti Pisipati

Tags: Verification Central, Verification IP, Automotive, Verification

Verification Viewpoints: Shift Left with Sanity Testing

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3 min read/May 10, 2024

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Verification Viewpoints: Shift Left with Sanity Testing

By Keith Redmond

Tags: Verification Central, Silicon IP, Verification

Interactive Debugging: Reduce Your Simulation Debug Turnaround Time

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3 min read/May 09, 2024

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Interactive Debugging: Reduce Your Simulation Debug Turnaround Time

By Vita Liao

Tags: Verification Central, Debug, Simulation, Verification

Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud

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2 min read/Apr 11, 2024

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Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud

By Anuj Pant

Tags: Customer Spotlight, Cloud, Chip Design Insights, Verification

Verifying CXL 3.1 Designs with Synopsys Verification IP

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4 min read/Apr 11, 2024

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Verifying CXL 3.1 Designs with Synopsys Verification IP

By Zongyao Wen, Nikhil Jain

Tags: Verification Central, Verification IP, Verification

Customer Spotlight: NXP's S32N Family of Processors Enables Vehicle Super-Integration for Central Compute Applications

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4 min read/Apr 10, 2024

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Customer Spotlight: NXP's S32N Family of Processors Enables Vehicle Super-Integration for Central Compute Applications

By Marc Serughetti

Tags: Verification Central, Automotive, Verification, Virtual Prototyping

Powering Innovation in the Era of Pervasive Intelligence

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4 min read/Apr 03, 2024

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Powering Innovation in the Era of Pervasive Intelligence

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

Reducing Errors and Iterations with an Enhanced Timing Constraints Signoff Flow

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3 min read/Mar 26, 2024

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Reducing Errors and Iterations with an Enhanced Timing Constraints Signoff Flow

By Naveen Battu, Rimpy Chugh

Tags: Static Verification, Product Spotlight, Chip Design Insights, Verification, Formal Verification

Faster, Higher Capacity Emulation and Prototyping for AI Workloads

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4 min read/Mar 20, 2024

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Faster, Higher Capacity Emulation and Prototyping for AI Workloads

By Samskrut Konduru

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Emulation, Verification

A Fast and Seamless Way to Burst to the Cloud for Peak EDA Workloads

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3 min read/Mar 20, 2024

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A Fast and Seamless Way to Burst to the Cloud for Peak EDA Workloads

By Vikram Bhatia

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

NeuReality Accelerates 7nm AI Chip Tape-Out with Cloud-Based Emulation

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4 min read/Mar 18, 2024

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NeuReality Accelerates 7nm AI Chip Tape-Out with Cloud-Based Emulation

By Idan Berko

Tags: Customer Spotlight, Cloud, AI & Machine Learning, Chip Design Insights, Verification

Industry Leaders Discuss “Overcoming the Challenges of Multi-die Systems Verification”

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8 min read/Mar 15, 2024

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Industry Leaders Discuss “Overcoming the Challenges of Multi-die Systems Verification”

By Verification Expert

Tags: Verification Central, Multi-Die System, Verification

Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

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4 min read/Mar 15, 2024

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Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

By Marc Serughetti

Tags: Verification Central, Design, Automotive, Verification, Virtual Prototyping

Synopsys Collaborates with Arm to Drive Automotive Design Excellence

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4 min read/Mar 13, 2024

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Synopsys Collaborates with Arm to Drive Automotive Design Excellence

By Stewart Williams

Tags: Chip Design Insights, SoC Verification Automation, Design, Automotive, Silicon IP, Verification, Virtual Prototyping, Platform

How Renesas Utilized Synopsys VSO.ai for a 30% Increase in SoC Verification Productivity

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3 min read/Mar 11, 2024

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How Renesas Utilized Synopsys VSO.ai for a 30% Increase in SoC Verification Productivity

By Taruna Reddy

Tags: Customer Spotlight, Chip Design Insights, Verification

SoC Design and Verification Solutions for a New Era of AI Chips

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9 min read/Mar 08, 2024

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SoC Design and Verification Solutions for a New Era of AI Chips

By Kiran Vittal

Tags: AI & Machine Learning, Debug, Chip Design Insights, Verification, Formal Verification

Q&A with Preeti Sharma: Why Innovation Is About Taking Small Steps Consistently

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5 min read/Mar 06, 2024

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Q&A with Preeti Sharma: Why Innovation Is About Taking Small Steps Consistently

By Synopsys Editorial Staff

Tags: Chip Design Insights, Automotive, Verification, Virtual Prototyping, Inside Synopsys

Industry's First Verification IP for Arm AMBA CHI-G

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5 min read/Mar 06, 2024

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Industry's First Verification IP for Arm AMBA CHI-G

By Sudhanshu Rao

Tags: Verification Central, Multi-Die System, Verification IP, Verification

Synopsys HAPS Prototyping Systems: Use Cases & Benefits

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2 min read/Feb 29, 2024

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Synopsys HAPS Prototyping Systems: Use Cases & Benefits

By Synopsys Editorial Staff

Tags: Prototyping, Verification

3 Key Trends for EDA in the Cloud in 2024

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5 min read/Feb 28, 2024

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3 Key Trends for EDA in the Cloud in 2024

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

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2 min read/Feb 27, 2024

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Verification Viewpoints: A New Blog Series for Today's Verification Expert

By Keith Redmond

Tags: Verification Central, Silicon IP, Verification

Synopsys AMBA CHI C2C System Verification Solutions

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5 min read/Feb 22, 2024

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Synopsys AMBA CHI C2C System Verification Solutions

By Venkatesh Kudumula

Tags: Verification Central, Multi-Die System, Verification IP, Verification

How Virtual Sensors Streamline Complex System Development

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4 min read/Feb 16, 2024

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How Virtual Sensors Streamline Complex System Development

By Emilie Viasnoff

Tags: Chip Design Insights, Verification, Optical, Virtual Prototyping

A Pain in the X! Why Debugging Xs can be Difficult

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5 min read/Feb 07, 2024

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A Pain in the X! Why Debugging Xs can be Difficult

By Myles Glisson

Tags: Verification Central, Debug, Verification

The Evolving Role of Layout-Versus-Schematic (LVS) Checking for Modern SoCs

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4 min read/Feb 07, 2024

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The Evolving Role of Layout-Versus-Schematic (LVS) Checking for Modern SoCs

By Srinivas Velivala

Tags: Chip Design Insights, Verification

AMBA VIP Supports Latest AXI-K Specification from Arm

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2 min read/Jan 19, 2024

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AMBA VIP Supports Latest AXI-K Specification from Arm

By Mohit Bhardwaj

Tags: Verification IP, Verification

Samsung Foundry Accelerates Billion-Gate Low-Power Signoff with Synopsys VC LP

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3 min read/Jan 18, 2024

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Samsung Foundry Accelerates Billion-Gate Low-Power Signoff with Synopsys VC LP

By Chiragkumar Patel, Avinash Palepu

Tags: Low Power, Chip Design Insights, Verification

Exploring Synopsys' Virtual Prototyping Services

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2 min read/Dec 11, 2023

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Exploring Synopsys' Virtual Prototyping Services

By Synopsys Editorial Staff

Tags: Verification, Virtual Prototyping

Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design

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5 min read/Nov 27, 2023

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Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design

By Geetha Rangarajan

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Verification

Running X-Propagation with Low-Power Simulation

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5 min read/Nov 21, 2023

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Running X-Propagation with Low-Power Simulation

By Manas Ranjan Raiguru

Tags: Verification Central, Simulation, Verification

Synopsys Commits to Advancing IC Design Talent and Chip Development in Vietnam

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4 min read/Nov 16, 2023

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Synopsys Commits to Advancing IC Design Talent and Chip Development in Vietnam

By Deirdre Hanford

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event

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2 min read/Nov 16, 2023

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Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event

By Mohit Bhardwaj

Tags: Verification Central, Verification IP, Verification

Synopsys Cloud: The Power of Automated License Management

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4 min read/Nov 14, 2023

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Synopsys Cloud: The Power of Automated License Management

By Varun Shah

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem

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3 min read/Oct 31, 2023

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Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

Don’t Risk Failure—The Verification Process Begins During Chip Architecture

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5 min read/Oct 18, 2023

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Don’t Risk Failure—The Verification Process Begins During Chip Architecture

By Kamal Desai, Dr. Johannes Stahl, Vivek Prasad

Tags: Data Center, Chip Design Insights, HPC, Data Center, Verification

Exploring Advanced Power Optimization for a More Sustainable Future

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3 min read/Oct 06, 2023

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Exploring Advanced Power Optimization for a More Sustainable Future

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Synopsys Users & Experts Come Together Again for Annual VC Formal SIG Event

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7 min read/Oct 01, 2023

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Synopsys Users & Experts Come Together Again for Annual VC Formal SIG Event

By Yann Antonioli

Tags: Verification Central, Verification, Formal Verification

Automatic Test Case Generation: When It Makes Sense

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1 min read/Sep 20, 2023

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Automatic Test Case Generation: When It Makes Sense

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Five Key Techniques to Accelerate Software Bring-Up for Multi-Die Systems

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7 min read/Sep 12, 2023

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Five Key Techniques to Accelerate Software Bring-Up for Multi-Die Systems

By Filip Thoen, Leonard Drucker, Vivek Prasad

Tags: Multi-Die System, Chip Design Insights, Verification

Introducing Next-Generation Verdi Platform for AI-Driven Debug and Verification Management

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4 min read/Sep 07, 2023

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Introducing Next-Generation Verdi Platform for AI-Driven Debug and Verification Management

By Robert Ruiz

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Verification

Synopsys Acquires PikeTec Software Engineering, Enhancing Electronics Digital Twins Platform

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5 min read/Aug 28, 2023

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Synopsys Acquires PikeTec Software Engineering, Enhancing Electronics Digital Twins Platform

By Synopsys Editorial Staff

Tags: Chip Design Insights, Automotive, Verification, Inside Synopsys

How Qualcomm Accelerated Coverage Closure with AI-Driven Verification

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4 min read/Aug 24, 2023

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How Qualcomm Accelerated Coverage Closure with AI-Driven Verification

By Malay Ganai, Will Chen

Tags: AI & Machine Learning, Chip Design Insights, Verification

What Are Digital Twins? A Primer on Virtual Models

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6 min read/Aug 23, 2023

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What Are Digital Twins? A Primer on Virtual Models

By Jason Niatas, Marc Serughetti, Ian Land

Tags: Aerospace & Government, Chip Design Insights, Automotive, Verification

Understanding Electrical System, Wiring and Harness Design Flow with SaberES Designer

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3 min read/Aug 16, 2023

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Understanding Electrical System, Wiring and Harness Design Flow with SaberES Designer

By Synopsys Editorial Staff

Tags: Verification

Saber for Robust Design: Achieving Reliable Performance

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3 min read/Aug 16, 2023

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Saber for Robust Design: Achieving Reliable Performance

By Synopsys Editorial Staff

Tags: Verification

Optimize UCIe 1.1 Verification with Synopsys VIP Solutions

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3 min read/Aug 07, 2023

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Optimize UCIe 1.1 Verification with Synopsys VIP Solutions

By Varun Agrawal

Tags: Verification Central, Verification IP, Verification

Saber for Aerospace Systems: Achieving Robust Design Flow

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4 min read/Aug 07, 2023

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Saber for Aerospace Systems: Achieving Robust Design Flow

By Synopsys Editorial Staff

Tags: Aerospace & Government, Verification, Virtual Prototyping

Saber for Automotive Systems: Advancing Robust Design Flow

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4 min read/Aug 07, 2023

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Saber for Automotive Systems: Advancing Robust Design Flow

By Synopsys Editorial Staff

Tags: Automotive, Verification

Key Considerations for Addressing Multi-Die System Verification Challenges

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6 min read/Aug 01, 2023

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Key Considerations for Addressing Multi-Die System Verification Challenges

By Arturo Salz, Dr. Johannes Stahl

Tags: Multi-Die System, Chip Design Insights, Verification

SaberES Designer Training Video Series: A Comprehensive Guide

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1 min read/Aug 01, 2023

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SaberES Designer Training Video Series: A Comprehensive Guide

By Synopsys Editorial Staff

Tags: Verification, Virtual Prototyping

New Distributed Simulation Technology for Faster Simulation of Multi-Die Systems

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4 min read/Jul 24, 2023

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New Distributed Simulation Technology for Faster Simulation of Multi-Die Systems

By Taruna Reddy

Tags: Multi-Die System, Chip Design Insights, Verification

Introducing the FEY-Approach in Test Automation

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10 min read/Jul 19, 2023

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Introducing the FEY-Approach in Test Automation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Streamline Projects with Verdi and VCS Coverage Tools

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2 min read/Jul 12, 2023

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Streamline Projects with Verdi and VCS Coverage Tools

By Taruna Reddy

Tags: Verification Central, Debug, Simulation, Verification, Formal Verification

Developing the Blueprint for Multi-Die Systems with Virtual Prototyping Tools

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7 min read/Jun 28, 2023

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Developing the Blueprint for Multi-Die Systems with Virtual Prototyping Tools

By Dr. Johannes Stahl, Tim Kogel

Tags: Multi-Die System, Chip Design Insights, Verification, Virtual Prototyping

The Lights Controller: Standard Example for Test Automation with TPT

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3 min read/Jun 28, 2023

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The Lights Controller: Standard Example for Test Automation with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

AI & Math Core Verification: Datapath Validation

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3 min read/Jun 25, 2023

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AI & Math Core Verification: Datapath Validation

By Jin Zhang

Tags: Verification Central, Verification, Formal Verification

How to Maximize PCIe 6.0’s Advantages with End-to-End PCIe Design Solutions

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9 min read/Jun 16, 2023

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How to Maximize PCIe 6.0’s Advantages with End-to-End PCIe Design Solutions

By Madhumita Sanyal, Gary Ruggles

Tags: Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

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4 min read/Jun 13, 2023

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Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

By Andy Tai, Ramesh Narayanaswamy

Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification

Leveraging Equivalence Classes for Testing with TPT

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5 min read/Jun 13, 2023

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Leveraging Equivalence Classes for Testing with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Comprehensive TSN Verification Solution by Synopsys

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4 min read/Jun 06, 2023

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Comprehensive TSN Verification Solution by Synopsys

By VIP Expert

Tags: Verification Central, Verification IP, Verification

What are Testlets? - Simplifying Software Testing with Testlets

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2 min read/May 24, 2023

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What are Testlets? - Simplifying Software Testing with Testlets

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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5 min read/May 19, 2023

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Why Designers are Using EDA Tools in the Cloud

By Vikram Bhatia

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

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6 min read/May 16, 2023

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How Cloud-Based IC Verification Cuts Design Rule Check Runtime

By Avanish Singh

Tags: Cloud, Chip Design Insights, Verification

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6 min read/May 09, 2023

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What Does the Future Hold for AI in Chip Design?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

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6 min read/May 08, 2023

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How to Shift Verification Left in Low-Power Chip Design

By Avinash Palepu

Tags: Static Verification, Product Spotlight, Chip Design Insights, Energy-Efficient SoCs, Verification, Formal Verification

Optimize NAND Flash Memory Verification: Part 1

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5 min read/May 08, 2023

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Optimize NAND Flash Memory Verification: Part 1

By Mohit Bhardwaj, Varun Agrawal

Tags: Verification Central, Verification

How Imparé Leverages Chip Design Verification in the Cloud

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6 min read/May 03, 2023

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How Imparé Leverages Chip Design Verification in the Cloud

By Rob van Blommestein

Tags: Customer Spotlight, Cloud, Debug, Chip Design Insights, Simulation, Verification

Understanding Assesslets: Innovative Test Documentation in Automotive Industry

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4 min read/May 02, 2023

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Understanding Assesslets: Innovative Test Documentation in Automotive Industry

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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4 min read/May 01, 2023

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How AI Revolutionized EDA Tools and Silicon Chip Design

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

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4 min read/Apr 27, 2023

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How Machine Learning Enhances Linting Tools

By Himanshu Kathuria, Rimpy Chugh

Tags: AI & Machine Learning, Chip Design Insights, Verification

Testing Simulink Models on Linux with TPT

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1 min read/Apr 23, 2023

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Testing Simulink Models on Linux with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Get Certified in Semiconductor Engineering

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2 min read/Apr 20, 2023

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Get Certified in Semiconductor Engineering

By Anupama Shojaei

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Understanding UFS 4.0: The Latest Flash Storage Spec

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5 min read/Apr 17, 2023

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Understanding UFS 4.0: The Latest Flash Storage Spec

By Dana Neustadter, LJ Chen

Tags: Chip Design Insights, 5G Wireless, Interface IP, Silicon IP, Verification

SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World

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5 min read/Apr 13, 2023

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SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World

By Rob van Blommestein

Tags: Multi-Die System, AI & Machine Learning, Silicon Lifecycle Management, Test, Chip Design Insights, Design, Verification, Inside Synopsys

Optimizing Low-Power SoC Design Verification & Analysis

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4 min read/Apr 05, 2023

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Optimizing Low-Power SoC Design Verification & Analysis

By Avinash Palepu

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Energy-Efficient SoCs, Verification

Revolutionizing Chip Design with AI-Enabled EDA Tools

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6 min read/Mar 29, 2023

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Revolutionizing Chip Design with AI-Enabled EDA Tools

By Arvind Narayanan

Tags: AI & Machine Learning, Test, Chip Design Insights, Design, Verification

Interface Protocol Validation with Synopsys ZeBu Solutions

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1 min read/Mar 27, 2023

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Interface Protocol Validation with Synopsys ZeBu Solutions

By Synopsys Editorial Staff

Tags: Emulation, Verification

SoC Design Verification and Chip Debug with AI

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6 min read/Mar 22, 2023

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SoC Design Verification and Chip Debug with AI

By Taruna Reddy, Robert Ruiz

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Discover the Latest in AI, EDA, and Multi-Die Systems

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2 min read/Mar 17, 2023

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Discover the Latest in AI, EDA, and Multi-Die Systems

By Rob van Blommestein

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

Optimizing Your Hardware IP Verification in the Cloud

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8 min read/Mar 14, 2023

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Optimizing Your Hardware IP Verification in the Cloud

By Meghana Bellumori

Tags: Cloud, Chip Design Insights, Verification

Ready for HBM2E? 2x More SoC Capacity, 50% More Speed

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5 min read/Mar 13, 2023

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Ready for HBM2E? 2x More SoC Capacity, 50% More Speed

By VIP Expert

Tags: Verification Central, Verification

Optimizing the RTL Design Flow with Real-Time PPA Analysis

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5 min read/Mar 09, 2023

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Optimizing the RTL Design Flow with Real-Time PPA Analysis

By Jim Schultz

Tags: RTL Synthesis, Product Spotlight, Debug, Chip Design Insights, Design, Verification

How to Get High-Performance Simulation with Predictable Capacity Uplift in the Cloud

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6 min read/Mar 07, 2023

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How to Get High-Performance Simulation with Predictable Capacity Uplift in the Cloud

By Meghana Bellumori

Tags: Cloud, Product Spotlight, Chip Design Insights, Simulation, Verification

Revolutionary Verification IPs for Arm AMBA 5 AXI-J, APB-E

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4 min read/Mar 06, 2023

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Revolutionary Verification IPs for Arm AMBA 5 AXI-J, APB-E

By VIP Expert

Tags: Verification Central, Verification

Enhancing Arm SoCs Performance with Smart Monitors

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4 min read/Feb 27, 2023

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Enhancing Arm SoCs Performance with Smart Monitors

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Reduced Maintenance & Improved Quality in Software Testing

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2 min read/Feb 22, 2023

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Reduced Maintenance & Improved Quality in Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Linting Techniques for Automotive and Aerospace Chip Design

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5 min read/Feb 16, 2023

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Linting Techniques for Automotive and Aerospace Chip Design

By Lokesh Ahuja, Rohit Kumar Ohlayan, Himanshu Kathuria

Tags: Product Spotlight, Aerospace & Government, Chip Design Insights, Automotive, Verification

Enhancing Chip Design Simulation with AI

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4 min read/Feb 15, 2023

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Enhancing Chip Design Simulation with AI

By Taruna Reddy

Tags: AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, Verification

Virtual Prototyping: Use Cases & Benefits

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1 min read/Feb 08, 2023

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Virtual Prototyping: Use Cases & Benefits

By Synopsys Editorial Staff

Tags: Verification

Hybrid Prototyping: Integrating Virtual and FPGA-based Prototypes

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1 min read/Feb 08, 2023

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Hybrid Prototyping: Integrating Virtual and FPGA-based Prototypes

By Synopsys Editorial Staff

Tags: Verification

Boosting Chip Design & Verification with AI EDA Tools

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5 min read/Feb 07, 2023

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Boosting Chip Design & Verification with AI EDA Tools

By Shankar Krishnamoorthy

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Verification

An Overview of Synopsys HAPS Prototyping Software

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2 min read/Feb 07, 2023

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An Overview of Synopsys HAPS Prototyping Software

By Synopsys Editorial Staff

Tags: Prototyping, Verification

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2 min read/Feb 07, 2023

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Verification Challenges on the Cloud

By Synopsys Editorial Staff

Tags: Cloud, Verification

Understanding HAPS Prototyping Systems and Accessories

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1 min read/Feb 06, 2023

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Understanding HAPS Prototyping Systems and Accessories

By Synopsys Editorial Staff

Tags: Prototyping, Verification

Accelerate RISC-V SoC Verification with TileLink IP

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4 min read/Jan 29, 2023

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Accelerate RISC-V SoC Verification with TileLink IP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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1 min read/Jan 25, 2023

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Interview with Ypsomed

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Parameters: A Major Challenge in Automotive Software Development

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5 min read/Jan 17, 2023

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Parameters: A Major Challenge in Automotive Software Development

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Addressing the Verification Challenges of Panel Self Refresh in eDP

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3 min read/Jan 16, 2023

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Addressing the Verification Challenges of Panel Self Refresh in eDP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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6 min read/Jan 10, 2023

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5 Cloud Predictions to Watch in 2023

By Vikram Bhatia, Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

How Returnship Programs Provide New Career Opportunities

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5 min read/Jan 09, 2023

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How Returnship Programs Provide New Career Opportunities

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Achieving 100% Confidence in Requirement Verification Tests

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9 min read/Jan 08, 2023

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Achieving 100% Confidence in Requirement Verification Tests

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Introduction to Automotive Testing Terms

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11 min read/Dec 20, 2022

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Introduction to Automotive Testing Terms

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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10 min read/Dec 19, 2022

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2022's EDA & Chip Design Advancements

By Synopsys Editorial Staff

Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside Synopsys, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification

Functional Safety in Automotive & Digital Ecosystems

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4 min read/Dec 17, 2022

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Functional Safety in Automotive & Digital Ecosystems

By VIP Expert

Tags: Verification Central, Verification IP, Verification

How to Achieve 2X Faster Waveform Dumping in Synopsys Verdi with VCS

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2 min read/Dec 15, 2022

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How to Achieve 2X Faster Waveform Dumping in Synopsys Verdi with VCS

By Taruna Reddy

Tags: Verification Central, Debug, Simulation, Verification

How Digital Tools Speed Up Memory Chip Design & Verification

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4 min read/Dec 12, 2022

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How Digital Tools Speed Up Memory Chip Design & Verification

By Farzin Rasteh, Preeti Jain, Anand Thiruvengadam, Jim Schultz

Tags: Memory, Chip Design Insights, Design, Verification

Latest Updates on Arm AMBA ACE5-Lite Protocol

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3 min read/Dec 11, 2022

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Latest Updates on Arm AMBA ACE5-Lite Protocol

By VIP Expert

Tags: Verification Central, Verification IP, Verification

How the Electronics Industry Can Shape a Sustainable World

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6 min read/Dec 06, 2022

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How the Electronics Industry Can Shape a Sustainable World

By Godwin Maben, Piyush Sancheti

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Energy-Efficient SoCs, Silicon IP, Verification

5 Secret Hacks to Minimize Testing Efforts

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5 min read/Dec 06, 2022

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5 Secret Hacks to Minimize Testing Efforts

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Synopsys 10BaseT1-S VIP for your Automotive SoCs

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3 min read/Nov 27, 2022

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Synopsys 10BaseT1-S VIP for your Automotive SoCs

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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5 min read/Nov 21, 2022

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What is AMS Verification?

By Dale Donchin, Dr. Johannes Stahl

Tags: Aerospace & Government, Prototyping, Chip Design Insights, Emulation, Verification

How Formal Verification Tools Enhance SoC Simulation Coverage

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4 min read/Nov 20, 2022

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How Formal Verification Tools Enhance SoC Simulation Coverage

By Jin Zhang

Tags: Product Spotlight, Chip Design Insights, Simulation, Verification, Formal Verification

Exploring ML-Based Regression Failure Analysis

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3 min read/Nov 15, 2022

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Exploring ML-Based Regression Failure Analysis

By Rob van Bloomestein

Tags: Verification Central, Debug, Verification

Preparing for Automotive SPICE Assessment: A Guide to Software Unit Verification

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11 min read/Nov 15, 2022

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Preparing for Automotive SPICE Assessment: A Guide to Software Unit Verification

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

How to Protect Advanced Chip Designs from Security Breaches

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5 min read/Nov 09, 2022

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How to Protect Advanced Chip Designs from Security Breaches

By Ian Land

Tags: Aerospace & Government, Silicon Lifecycle Management, Prototyping, Chip Design Insights, Simulation, Design, Emulation, Silicon IP, Verification, Formal Verification

How SOAFEE Enables Next-Generation Connected Vehicles

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4 min read/Nov 08, 2022

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How SOAFEE Enables Next-Generation Connected Vehicles

By Stewart Williams

Tags: Chip Design Insights, Automotive, Verification

Celebrating STEM Day with Advice from Early-Career R&D Engineers

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5 min read/Nov 07, 2022

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Celebrating STEM Day with Advice from Early-Career R&D Engineers

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Learn About the Latest Arm AMBA AXI5 Features

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4 min read/Nov 05, 2022

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Learn About the Latest Arm AMBA AXI5 Features

By VIP Expert

Tags: Verification Central, Verification IP, Verification

The Importance of Unit Definition in the Testing Process with TPT

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2 min read/Nov 03, 2022

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The Importance of Unit Definition in the Testing Process with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

First Verification IP for Arm AMBA 5 CHI-F Unveiled

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4 min read/Oct 30, 2022

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First Verification IP for Arm AMBA 5 CHI-F Unveiled

By VIP Expert

Tags: Verification Central, Verification

What is Code Linting? - Advanced Linting & SoC Design (Part 1)

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5 min read/Oct 26, 2022

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What is Code Linting? - Advanced Linting & SoC Design (Part 1)

By Rohit Kumar Ohlayan, Himanshu Kathuria, Rimpy Chugh

Tags: Static Verification, Chip Design Insights, Verification, Formal Verification

Advanced Protocol Standards Verification for SoC Designs

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6 min read/Oct 24, 2022

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Advanced Protocol Standards Verification for SoC Designs

By Vikas Gautam

Tags: Debug, Prototyping, Chip Design Insights, Emulation, Interface IP, Verification IP, Silicon IP, Verification

Synopsys ZeBu Innovation: Advancing Emulation Technology for Complex SoC Verification

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1 min read/Oct 19, 2022

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Synopsys ZeBu Innovation: Advancing Emulation Technology for Complex SoC Verification

By Synopsys Editorial Staff

Tags: Emulation, Verification

How Digital Twins are Transforming Aerospace and Defense

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6 min read/Oct 18, 2022

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How Digital Twins are Transforming Aerospace and Defense

By Jason Niatas, Marc Serughetti, Ian Land

Tags: Aerospace & Government, Chip Design Insights, Design, Verification

Maximizing UFS 4.0 Authentication with Advanced RPMB

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3 min read/Oct 15, 2022

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Maximizing UFS 4.0 Authentication with Advanced RPMB

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Regression vs. Back-to-Back Testing: Which One to Choose in TPT?

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1 min read/Oct 13, 2022

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Regression vs. Back-to-Back Testing: Which One to Choose in TPT?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Unified Emulation & Prototyping for Chip Development

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2 min read/Oct 03, 2022

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Unified Emulation & Prototyping for Chip Development

By Tom De Schutter

Tags: Verification Central, Emulation, Verification

Unifying Timing Constraints with FishTail Design Automation

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4 min read/Sep 27, 2022

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Unifying Timing Constraints with FishTail Design Automation

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Signoff, Verification

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1 min read/Sep 26, 2022

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Automating Test Automation with TPT API

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

SNUG Israel 2022 Spotlights Talks on Silicon Design, Verification, and IP Solutions for AI, Cloud and Automotive

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1 min read/Sep 20, 2022

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SNUG Israel 2022 Spotlights Talks on Silicon Design, Verification, and IP Solutions for AI, Cloud and Automotive

By Isaac Zafrany

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, Silicon IP, Verification, Inside Synopsys

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3 min read/Sep 20, 2022

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Setting Up Scenarios for SOTIF in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Enabling Edge Machine Learning Applications with SiMA.ai

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4 min read/Sep 14, 2022

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Enabling Edge Machine Learning Applications with SiMA.ai

By Stelios Diamantidis

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Chip Design Insights, Design, Emulation, Signoff, Silicon IP, Verification

Fault Simulation Techniques for Safety-Critical Chip Designs

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2 min read/Sep 13, 2022

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Fault Simulation Techniques for Safety-Critical Chip Designs

By Kirankumar Karanam, Rimpy Chugh

Tags: Aerospace & Government, Chip Design Insights, Automotive, Verification

AI-Driven Debug Automation Speeds Up Root-Cause Analysis

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2 min read/Sep 11, 2022

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AI-Driven Debug Automation Speeds Up Root-Cause Analysis

By Rob van Blommestein

Tags: AI & Machine Learning, Debug, Chip Design Insights, Design, Verification

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1 min read/Sep 04, 2022

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Synopsys VCS and VIP By-the-Minute

By Verification Expert

Tags: Verification Central, Cloud, Simulation, Verification IP, Verification

Creating an AI Accelerator Chip in 18 Months with Neuchips

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4 min read/Aug 31, 2022

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Creating an AI Accelerator Chip in 18 Months with Neuchips

By Rich Collins, Kevin Wei, Kinny Chen

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Processor Solutions, Silicon IP, Verification

Power-Aware Clock Domain Crossing with STMicroelectronics

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5 min read/Aug 23, 2022

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Power-Aware Clock Domain Crossing with STMicroelectronics

By Deepak Ahuja, Navneet Kumar Chaurasia

Tags: Customer Spotlight, Static Verification, Chip Design Insights, Verification, Formal Verification

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5 min read/Aug 22, 2022

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PCIe 6.0 Verification of FEC and CRC

By VIP Expert

Tags: Verification Central, Verification IP, Verification

How Digital Twins Drive Innovation in the Automotive Industry

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5 min read/Aug 16, 2022

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How Digital Twins Drive Innovation in the Automotive Industry

By Marc Serughetti

Tags: Chip Design Insights, Automotive, Verification, Virtual Prototyping

Virtual Prototyping Tools Speed Up Software Development

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5 min read/Aug 01, 2022

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Virtual Prototyping Tools Speed Up Software Development

By Kamal Desai, Sam Tennent

Tags: Chip Design Insights, Verification, Virtual Prototyping

Industry's First CXL 3.0 Verification Solution

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5 min read/Aug 01, 2022

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Industry's First CXL 3.0 Verification Solution

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Returning to Work After A Career Break: RIYA Returnship

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4 min read/Jul 25, 2022

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Returning to Work After A Career Break: RIYA Returnship

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Enhancing Chip Verification with AI and Machine Learning

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4 min read/Jul 12, 2022

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Enhancing Chip Verification with AI and Machine Learning

By Rob van Blommestein

Tags: Multi-Die System, Static Verification, AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, HPC, Data Center, Verification, Formal Verification

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5 min read/Jul 11, 2022

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What is a SmartNIC?

By Rita Horner

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Security IP, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design

Synopsys Protocol Verification Solution for UCIe 1.0

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5 min read/Jul 06, 2022

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Synopsys Protocol Verification Solution for UCIe 1.0

By VIP Expert

Tags: Verification Central, Verification IP, Verification

DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing

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4 min read/Jul 05, 2022

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DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing

By Rob van Bloomestein

Tags: Cloud, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

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1 min read/Jul 03, 2022

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5 Reasons for Testing Simulink with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

YWCA Tribute to Women Awards Honors Women of Synopsys

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5 min read/Jun 28, 2022

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YWCA Tribute to Women Awards Honors Women of Synopsys

By Synopsys Editorial Staff

Tags: Prototyping, Chip Design Insights, Emulation, Silicon IP, Verification, Inside Synopsys

Accelerating Automotive Software & Processor Design with NXP

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4 min read/Jun 23, 2022

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Accelerating Automotive Software & Processor Design with NXP

By Marc Serughetti

Tags: Customer Spotlight, Chip Design Insights, Automotive, Verification

Formal Verification Services Ramp Up SoC Design Productivity

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5 min read/Jun 21, 2022

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Formal Verification Services Ramp Up SoC Design Productivity

By Jin Zhang

Tags: Chip Design Insights, Verification, Formal Verification

Adding Semiconductor Engineering Degree Programs at Purdue

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5 min read/Jun 15, 2022

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Adding Semiconductor Engineering Degree Programs at Purdue

By Patrick Haspel

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Fault Simulation Techniques for Growing Chip Complexity

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6 min read/Jun 01, 2022

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Fault Simulation Techniques for Growing Chip Complexity

By Brian Davenport, Rimpy Chugh

Tags: Customer Spotlight, Aerospace & Government, Debug, Chip Design Insights, Simulation, Automotive, Verification

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4 min read/May 25, 2022

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HDMI's Quick Media Switching

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Ensuring Software Compatibility Across Arm-Based Hardware

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4 min read/May 16, 2022

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Ensuring Software Compatibility Across Arm-Based Hardware

By Ashutosh Varma

Tags: Chip Design Insights, Interface IP, Verification IP, Silicon IP, Verification

Leveraging Static Linting Tools - ASIC Design Challenges

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7 min read/May 10, 2022

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Leveraging Static Linting Tools - ASIC Design Challenges

By Rohit Kumar Ohlayan, Rimpy Chugh

Tags: Static Verification, Chip Design Insights, Verification, Formal Verification

Hardware-in-the-Loop (HiL) Testing with TPT and ASAM XiL

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1 min read/May 03, 2022

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Hardware-in-the-Loop (HiL) Testing with TPT and ASAM XiL

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Introducing Markup in TPT18: Enhance Your Test Case Clarity

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1 min read/Apr 25, 2022

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Introducing Markup in TPT18: Enhance Your Test Case Clarity

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Speed Up Simulink in Rapid Accelerator Mode

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1 min read/Apr 19, 2022

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Speed Up Simulink in Rapid Accelerator Mode

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Catalyzing the Impossible – When Semiconductor Design Gets Its SaaS On

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4 min read/Apr 13, 2022

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Catalyzing the Impossible – When Semiconductor Design Gets Its SaaS On

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, Verification, Inside Synopsys

Optimizing Physical Chip Design Verification with AWS Cloud

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1 min read/Apr 05, 2022

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Optimizing Physical Chip Design Verification with AWS Cloud

By Ahmed Elzeftawi

Tags: Customer Spotlight, Cloud, Chip Design Insights, Verification

Meeting ASIL D & ISO 26262 Requirements with Automation

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5 min read/Mar 23, 2022

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Meeting ASIL D & ISO 26262 Requirements with Automation

By Stewart Williams

Tags: Chip Design Insights, Automotive, Silicon IP, Verification

2022: The Year of Cloud-Based Chip Design & Verification

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7 min read/Mar 22, 2022

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2022: The Year of Cloud-Based Chip Design & Verification

By Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

Boosting EDA Workloads with 3rd Gen AMD EPYC™ Processors

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4 min read/Mar 20, 2022

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Boosting EDA Workloads with 3rd Gen AMD EPYC™ Processors

By Ramesh Narayanaswamy

Tags: Customer Spotlight, Debug, Chip Design Insights, Simulation, Verification

Formal Requirements vs. Natural Language Requirements

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1 min read/Mar 20, 2022

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Formal Requirements vs. Natural Language Requirements

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

SNUG Silicon Valley 2022: Synopsys Users Group

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2 min read/Mar 14, 2022

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SNUG Silicon Valley 2022: Synopsys Users Group

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification, Inside Synopsys

Practical Power Management: How the UPF 3.0 Standard is Transforming SoC Design

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5 min read/Feb 24, 2022

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Practical Power Management: How the UPF 3.0 Standard is Transforming SoC Design

By Patrick Sheridan, Tim Kogel

Tags: Energy-Efficient SoCs, Verification

MC/DC Coverage: The Struggle of Reaching 100% Coverage

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3 min read/Feb 20, 2022

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MC/DC Coverage: The Struggle of Reaching 100% Coverage

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Coverage Models – Filling in the Holes for Memory VIP

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2 min read/Feb 13, 2022

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Coverage Models – Filling in the Holes for Memory VIP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

What is Reset Domain Crossing? - ASIC Design Challenges

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5 min read/Feb 07, 2022

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What is Reset Domain Crossing? - ASIC Design Challenges

By Paras Mal Jain, Rimpy Chugh

Tags: Static Verification, Chip Design Insights, Verification

Advancing STEM Education & Research with EDA Tools

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4 min read/Jan 31, 2022

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Advancing STEM Education & Research with EDA Tools

By Synopsys Editorial Staff

Tags: TCAD, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

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3 min read/Jan 26, 2022

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A New World of Tech Innovation

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

Faster Closure, Simulation Acceleration to Emulation

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3 min read/Jan 24, 2022

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Faster Closure, Simulation Acceleration to Emulation

By VIP Expert

Tags: Verification Central, Verification IP, Verification

The Future of High-Performance Computing: Key Predictions for 2022

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7 min read/Jan 19, 2022

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The Future of High-Performance Computing: Key Predictions for 2022

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Verification

Accelerating System Debug in the SoC Verification Flow

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4 min read/Jan 17, 2022

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Accelerating System Debug in the SoC Verification Flow

By Swami Venkat, Taruna Reddy

Tags: AI & Machine Learning, Debug, Chip Design Insights, Verification

AI Chip Design: How SoCs are Designed for AI Applications

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2 min read/Jan 12, 2022

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AI Chip Design: How SoCs are Designed for AI Applications

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

PCI Express 6.0: High Bandwidth Interconnect

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2 min read/Jan 12, 2022

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PCI Express 6.0: High Bandwidth Interconnect

By VIP Expert

Tags: Verification Central, Verification IP, Verification

5G SoC Design: Enabling Virtual Verification with Keysight

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6 min read/Jan 10, 2022

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5G SoC Design: Enabling Virtual Verification with Keysight

By Varun Agrawal

Tags: Chip Design Insights, Emulation, 5G Wireless, Verification

What is Processor-in-the-Loop (PiL) Testing?

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1 min read/Jan 04, 2022

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What is Processor-in-the-Loop (PiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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4 min read/Dec 19, 2021

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Where Does Innovation Come From?

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Silicon IP, Verification, Inside Synopsys

What is Software-in-the-Loop (SiL) Testing?

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2 min read/Dec 01, 2021

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What is Software-in-the-Loop (SiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Virtual Electronic Control Unit (ECU) Prototyping Tools

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7 min read/Nov 28, 2021

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Virtual Electronic Control Unit (ECU) Prototyping Tools

By Jakob Mauss, Mathias Hoehne

Tags: Chip Design Insights, Automotive, Verification, Virtual Prototyping

What is Clock Domain Crossing? - ASIC Design Challenges

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7 min read/Nov 22, 2021

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What is Clock Domain Crossing? - ASIC Design Challenges

By Rimpy Chugh

Tags: Debug, Chip Design Insights, Simulation, Verification

Functional Chip Design Verification: When Is It Truly Finished?

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5 min read/Nov 21, 2021

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Functional Chip Design Verification: When Is It Truly Finished?

By Will Chen, Anika Malhotra

Tags: AI & Machine Learning, Debug, Chip Design Insights, Verification IP, Verification

Formal Chip Design Verification in the Cloud: EDA Tools

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6 min read/Nov 15, 2021

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Formal Chip Design Verification in the Cloud: EDA Tools

By Pratik Mahajan, Ahmed Elzeftawi

Tags: Cloud, Chip Design Insights, Verification, Formal Verification

Advancing Women in Tech Careers: Q&A with Latha Venkatachari

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7 min read/Nov 10, 2021

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Advancing Women in Tech Careers: Q&A with Latha Venkatachari

By Synopsys Editorial Staff

Tags: Debug, Chip Design Insights, Verification, Inside Synopsys, Formal Verification

Cloud SoC Prototyping: FPGA Prototyping Tools as a Service

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6 min read/Nov 10, 2021

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Cloud SoC Prototyping: FPGA Prototyping Tools as a Service

By Achim Nohl

Tags: Cloud, Chip Design Insights, Verification

Software-Enabled Full Chip Power Signoff & SoC Verification

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5 min read/Nov 03, 2021

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Software-Enabled Full Chip Power Signoff & SoC Verification

By Godwin Maben

Tags: Chip Design Insights, Simulation, Emulation, Energy-Efficient SoCs, Verification

ASIC Hardware Verification: Debug Challenges & Solutions

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7 min read/Oct 26, 2021

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ASIC Hardware Verification: Debug Challenges & Solutions

By Kiran Vittal

Tags: Debug, Prototyping, Chip Design Insights, Emulation, Verification, Virtual Prototyping, Formal Verification

HBM3: The Next Generation Memory Standard

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2 min read/Oct 09, 2021

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HBM3: The Next Generation Memory Standard

By VIP Expert

Tags: Verification Central, Verification IP, Verification

RTL Debugging via FPGA Prototyping: SoC Design Challenges

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5 min read/Oct 06, 2021

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RTL Debugging via FPGA Prototyping: SoC Design Challenges

By Rob Parris

Tags: Debug, Prototyping, Chip Design Insights, Verification

Unified Power Format Expands Low-Power IC Design

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8 min read/Oct 04, 2021

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Unified Power Format Expands Low-Power IC Design

By Nikhil Amin, Harsha Vardhan

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Building Secure Chips with Verified CXL IDEs

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3 min read/Sep 21, 2021

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Building Secure Chips with Verified CXL IDEs

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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5 min read/Sep 20, 2021

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Upgrading FPGA Prototyping for RTL Debug Productivity

By Rob Parris

Tags: Debug, Prototyping, Chip Design Insights, Verification

Q&A with VLSI Intern at WISH Conference 2021: Priyanka Joshi

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5 min read/Sep 13, 2021

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Q&A with VLSI Intern at WISH Conference 2021: Priyanka Joshi

By Synopsys Editorial Staff

Tags: Chip Design Insights, Silicon IP, Verification, Inside Synopsys

Automotive Functional Safety ISO 26262: Key Challenges

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5 min read/Aug 31, 2021

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Automotive Functional Safety ISO 26262: Key Challenges

By Marc Serughetti

Tags: Chip Design Insights, Automotive, Verification

Top 5 Electric Vehicle Design Challenges

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7 min read/Aug 22, 2021

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Top 5 Electric Vehicle Design Challenges

By Datsen Davies Tharakan

Tags: Chip Design Insights, Automotive, Verification, Virtual Prototyping

CXL Design V&V with Synopsys Protocol Continuum

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2 min read/Aug 17, 2021

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CXL Design V&V with Synopsys Protocol Continuum

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Virtual Prototyping Shifts Software & SoC Design Left

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5 min read/Aug 11, 2021

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Virtual Prototyping Shifts Software & SoC Design Left

By Tim Kogel

Tags: Prototyping, Chip Design Insights, Emulation, Verification, Virtual Prototyping

5G SoC Verification: Enabling 5G Rollout with SoC Emulation

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6 min read/Aug 10, 2021

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5G SoC Verification: Enabling 5G Rollout with SoC Emulation

By Susheel Tadikonda

Tags: Chip Design Insights, Emulation, 5G Wireless, Verification

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2 min read/Aug 01, 2021

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LPDDR5X - The Future of Mobile Memory

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Improved Power System Optimization for SoC Designs

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6 min read/Jul 28, 2021

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Improved Power System Optimization for SoC Designs

By Jay Roy

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Enabling 800G Ethernet Bandwidth for Hyperscale Data Centers

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5 min read/Jul 27, 2021

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Enabling 800G Ethernet Bandwidth for Hyperscale Data Centers

By Priyank Shukla, John Swanson, Anika Malhotra

Tags: AI & Machine Learning, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP, Verification

Aaroh Labs Advanced-Node Semiconductor Designs

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3 min read/Jul 26, 2021

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Aaroh Labs Advanced-Node Semiconductor Designs

By Rob van Bloomestein

Tags: Customer Spotlight, Chip Design Insights, Design, Internet of Things, HPC, Data Center, Verification

Virtual Prototyping to Avoid Bad ASIC Design Decisions

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4 min read/Jul 20, 2021

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Virtual Prototyping to Avoid Bad ASIC Design Decisions

By Tim Kogel

Tags: Chip Design Insights, Verification, Virtual Prototyping

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7 min read/Jul 18, 2021

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Extending Battery Life of a Mobile SoC

By Sylvain Bayon De Noyer

Tags: Prototyping, Verification

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8 min read/Jul 18, 2021

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Faster Prototyping with HAPS

By Achim Nohl

Tags: Prototyping, Verification

Boosting Chip Verification with Fast SoC Emulation

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4 min read/Jul 12, 2021

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Boosting Chip Verification with Fast SoC Emulation

By Dr. Johannes Stahl

Tags: AI & Machine Learning, Chip Design Insights, 5G Wireless, Automotive, HPC, Data Center, Verification

How Emulation Helps Find Power Bugs During SoC Verification

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5 min read/Jul 06, 2021

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How Emulation Helps Find Power Bugs During SoC Verification

By Alex Wakefield

Tags: Static Verification, Chip Design Insights, Simulation, Design, Emulation, Energy-Efficient SoCs, Signoff, Verification, Virtual Prototyping, Formal Verification

Semiconductors & Chip Design Drive Global Innovation

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5 min read/Jun 29, 2021

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Semiconductors & Chip Design Drive Global Innovation

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Verification

Cloud EDA Tools Fuel Semiconductor Design Innovation

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6 min read/Jun 28, 2021

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Cloud EDA Tools Fuel Semiconductor Design Innovation

By Teng-Kiat Lee, Sridhar Panchapakesan, Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Verification

Reduced Blanking for Low Power, High Res Displays

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3 min read/Jun 23, 2021

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Reduced Blanking for Low Power, High Res Displays

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Accelerating Networking SoC Design with Cloud Emulation

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5 min read/Jun 16, 2021

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Accelerating Networking SoC Design with Cloud Emulation

By Dr. Johannes Stahl

Tags: Cloud, Chip Design Insights, Verification

FPGA Prototyping for Scaled-Out Chip Design & Validation

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4 min read/Jun 08, 2021

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FPGA Prototyping for Scaled-Out Chip Design & Validation

By Rob Parris

Tags: AI & Machine Learning, Prototyping, Chip Design Insights, 5G Wireless, Automotive, Verification

Memory Mapped Registers in CXL 2.0 Devices

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2 min read/Jun 02, 2021

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Memory Mapped Registers in CXL 2.0 Devices

By VIP Expert

Tags: Verification Central, Verification IP, Verification

AMBA®CHI New Features for Cache Coherent Verification

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1 min read/May 30, 2021

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AMBA®CHI New Features for Cache Coherent Verification

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Faster Chiplet & SoC Design: Collaboration with Arm

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4 min read/May 25, 2021

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Faster Chiplet & SoC Design: Collaboration with Arm

By Michael Posner, Neel Desai

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Interface IP, HPC, Data Center, Silicon IP, Verification

Fault Injection Testing Methods with TPT

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1 min read/May 09, 2021

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Fault Injection Testing Methods with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

On-the-Fly Code Review Maximizes Chip Design Process

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5 min read/May 05, 2021

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On-the-Fly Code Review Maximizes Chip Design Process

By Kiran Vittal

Tags: Chip Design Insights, Design, Verification

How 5G Infrastructure Accelerates Smart City Projects

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5 min read/May 04, 2021

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How 5G Infrastructure Accelerates Smart City Projects

By Ron Lowman

Tags: Chip Design Insights, Design, 5G Wireless, Internet of Things, Silicon IP, Verification

Safeguarding Automotive Sensors for Automotive Safety

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5 min read/Apr 28, 2021

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Safeguarding Automotive Sensors for Automotive Safety

By Samantha Beaumont

Tags: Prototyping, Chip Design Insights, Design, Automotive, Silicon IP, Verification

FPGA Prototyping Powers the SoC Design & Verification Process

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4 min read/Apr 14, 2021

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FPGA Prototyping Powers the SoC Design & Verification Process

By Dr. Johannes Stahl

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Design, 5G Wireless, Verification

Advancing AI Chip Design with IBM's Hybrid Cloud Architecture

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4 min read/Apr 13, 2021

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Advancing AI Chip Design with IBM's Hybrid Cloud Architecture

By Arun Venkatachar

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Beyond Functional Testing: The TASMO Approach

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2 min read/Apr 11, 2021

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Beyond Functional Testing: The TASMO Approach

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Accelerate SoC Verification, Experts Available

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1 min read/Mar 31, 2021

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Accelerate SoC Verification, Experts Available

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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1 min read/Mar 28, 2021

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Testing ASCET-DEVELOPER Models with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Emulation Technology for Faster SoC Power Verification

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4 min read/Mar 16, 2021

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Emulation Technology for Faster SoC Power Verification

By Dr. Johannes Stahl

Tags: AI & Machine Learning, Chip Design Insights, Design, Emulation, 5G Wireless, Energy-Efficient SoCs, Signoff, Verification

Ensuring Reliability in HAPS Physical Prototyping Systems

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8 min read/Mar 16, 2021

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Ensuring Reliability in HAPS Physical Prototyping Systems

By Neil Songcuan

Tags: Verification

How Prototyping Increases Interoperability Success

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6 min read/Mar 16, 2021

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How Prototyping Increases Interoperability Success

By João Lucas

Tags: Prototyping, Verification

Synopsys ZeBu Use Cases: Tackling SoC Verification Tasks

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3 min read/Mar 16, 2021

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Synopsys ZeBu Use Cases: Tackling SoC Verification Tasks

By Synopsys Editorial Staff

Tags: Verification

Why Adaptability is Key to Faster Prototyping

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5 min read/Mar 15, 2021

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Why Adaptability is Key to Faster Prototyping

By Dr. Antonio Salazar

Tags: Prototyping, Verification

Finding Hardware Bugs Faster with Full Visibility Debug

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9 min read/Mar 15, 2021

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Finding Hardware Bugs Faster with Full Visibility Debug

By Andy Jolley

Tags: Prototyping, Verification

Navigating the Transition from MiL to vHiL with Virtualizer Studio: A Comprehensive Guide

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7 min read/Mar 15, 2021

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Navigating the Transition from MiL to vHiL with Virtualizer Studio: A Comprehensive Guide

By Andreas Ropers, Markus Wedler

Tags: Prototyping, Verification

Future of Automotive Sensor Fusion & Data Handling

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5 min read/Mar 04, 2021

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Future of Automotive Sensor Fusion & Data Handling

By Chris Clark

Tags: Chip Design Insights, Design, Automotive, Verification

Verifying Complex Datapath Designs with HECTOR

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5 min read/Feb 23, 2021

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Verifying Complex Datapath Designs with HECTOR

By Kiran Vittal, Alfred Koelbl, Pratik Mahajan

Tags: AI & Machine Learning, Debug, Chip Design Insights, Verification, Formal Verification

The Fascinating Path of CXL 2.0 Device Discovery

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1 min read/Feb 10, 2021

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The Fascinating Path of CXL 2.0 Device Discovery

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Virtual Prototyping for Accelerating Electric Car Design

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4 min read/Feb 09, 2021

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Virtual Prototyping for Accelerating Electric Car Design

By Marc Serughetti, Jim Patton

Tags: Chip Design Insights, Automotive, Verification, Virtual Prototyping

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1 min read/Feb 07, 2021

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Boundary Value Testing Methods in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Testing AUTOSAR Software Components with TPT

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1 min read/Jan 31, 2021

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Testing AUTOSAR Software Components with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Effective Requirements-Based Testing Strategies with TPT

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2 min read/Jan 24, 2021

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Effective Requirements-Based Testing Strategies with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Meeting Auto Safety Standards with EDA Tools & IP Solutions

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4 min read/Jan 19, 2021

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Meeting Auto Safety Standards with EDA Tools & IP Solutions

By Meirav Nitzen, Swami Venkat

Tags: Chip Design Insights, Design, Automotive, Silicon IP, Verification

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4 min read/Jan 13, 2021

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5 Key Smart Technology Innovations

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Emulation, 5G Wireless, Internet of Things, Interface IP, Virtual Prototyping, Cloud, Chip Design Insights, Design, Security IP, Automotive, Silicon IP, Verification

ADAS Testing with TPT: Scenario-Based Strategies and Validation

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1 min read/Dec 12, 2020

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ADAS Testing with TPT: Scenario-Based Strategies and Validation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Advancing Women in STEM: Q&A with Lisa McIlwain

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5 min read/Dec 09, 2020

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Advancing Women in STEM: Q&A with Lisa McIlwain

By Synopsys Editorial Staff

Tags: Chip Design Insights, Verification, Inside Synopsys

Back-to-Back MiL-SiL-PiL Testing with TPT: Aligning Development Phases

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1 min read/Nov 23, 2020

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Back-to-Back MiL-SiL-PiL Testing with TPT: Aligning Development Phases

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

CXL: Secured Network Traffic Specification

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1 min read/Nov 12, 2020

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CXL: Secured Network Traffic Specification

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Model-in-Loop Testing with TPT: Efficient Simulink Model Testing

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1 min read/Oct 21, 2020

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Model-in-Loop Testing with TPT: Efficient Simulink Model Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Defining the AI Era with the IBM Research AI Hardware Center

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4 min read/Oct 20, 2020

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Defining the AI Era with the IBM Research AI Hardware Center

By Arun Venkatachar

Tags: Multi-Die System, AI & Machine Learning, Emulation, Interface IP, Virtual Prototyping, Chip Design Insights, Design, Manufacturing, Design Technology Co-Optimization, Processor Solutions, Silicon IP, Verification, 3DIC Design

Understanding Color Space Conversions in Display

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4 min read/Sep 20, 2020

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Understanding Color Space Conversions in Display

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Scalable Performance for SoC Hardware & Software Development

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4 min read/Sep 01, 2020

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Scalable Performance for SoC Hardware & Software Development

By Marc Serughetti, Dr. Johannes Stahl

Tags: Prototyping, Chip Design Insights, Verification, Virtual Prototyping

PEGASUS Project: Advanced Automated Driving Tests with TPT

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1 min read/Sep 01, 2020

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PEGASUS Project: Advanced Automated Driving Tests with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Accelerating Critical Embedded Software Development for SoCs

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7 min read/Aug 25, 2020

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Accelerating Critical Embedded Software Development for SoCs

By Marc Serughetti, Dr. Johannes Stahl

Tags: Chip Design Insights, Verification, Virtual Prototyping

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4 min read/Aug 24, 2020

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8K Ultra HD: A Giant Leap for HDTVs

By VIP Expert

Tags: Verification Central, Verification

Prototyping Early Software Development & System Validation in SoC Design

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4 min read/Aug 12, 2020

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Prototyping Early Software Development & System Validation in SoC Design

By Marc Serughetti, Dr. Johannes Stahl

Tags: Chip Design Insights, Verification, Virtual Prototyping

TPT Autotester vs. TPT Dashboard: What's the Difference?

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1 min read/Jul 22, 2020

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TPT Autotester vs. TPT Dashboard: What's the Difference?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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1 min read/Jul 19, 2020

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JEDEC Announces DDR5 SDRAM VIP for HPC

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Securing Network Traffic using MACSec Over Ethernet

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2 min read/Jun 25, 2020

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Securing Network Traffic using MACSec Over Ethernet

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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3 min read/Jun 13, 2020

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A New Generation of LPDDR

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jun 10, 2020

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Understanding Color Space in Display

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Accelerating NoC Verification via Automated Testbench

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1 min read/Jun 07, 2020

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Accelerating NoC Verification via Automated Testbench

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/May 25, 2020

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ADAS NCAP AEB Tests Made Easy

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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2 min read/Apr 20, 2020

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VIP for AMBA CXS: Early Adopter Success

By VIP Expert

Tags: Verification Central, Verification IP, Verification

256Gb/s Ready Set Go: PCIe Gen6 Verification IP

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3 min read/Mar 15, 2020

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256Gb/s Ready Set Go: PCIe Gen6 Verification IP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Mar 11, 2020

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DDR5 - Off and Running

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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4 min read/Mar 03, 2020

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An Introduction to the CXL Device Types

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Simplify Entertainment with HDMI 2.1 eARC

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2 min read/Jan 28, 2020

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Simplify Entertainment with HDMI 2.1 eARC

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jan 25, 2020

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Deciphering the New TileLink Standard

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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1 min read/Jan 15, 2020

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Optimizing HBM2E Runtime Performance

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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1 min read/Jan 14, 2020

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The Power of HDMI ARC

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Ethernet 802.3ck: Welcome 800G and Terabit Speeds

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3 min read/Dec 16, 2019

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Ethernet 802.3ck: Welcome 800G and Terabit Speeds

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Demystifying PCIe PIPE 5.1 SerDes Architecture

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3 min read/Nov 20, 2019

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Demystifying PCIe PIPE 5.1 SerDes Architecture

By Deepak Kumar Lnu

Tags: Verification Central, Verification IP, Verification

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3 min read/Nov 10, 2019

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Managing NVMe Verification Complexity

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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4 min read/Nov 03, 2019

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Arm AMBA5 CHI-D Verification IP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Reduce Link Bring-Up Time with PCIe 5.0 Modes

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3 min read/Oct 23, 2019

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Reduce Link Bring-Up Time with PCIe 5.0 Modes

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Oct 01, 2019

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HBM Performance Verification Made Easy

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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3 min read/Sep 22, 2019

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How to Reduce Memory Model Debug Time

By VIP Expert

Tags: Verification Central, Verification IP, Verification

MIPI CSI-2 v3.0: Comprehensive 5G Imaging Solution

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1 min read/Sep 17, 2019

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MIPI CSI-2 v3.0: Comprehensive 5G Imaging Solution

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Sep 12, 2019

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De-mystifying CXL: An Overview

By VIP Expert

Tags: Verification Central, Verification IP, Verification

NVDIMMs – A Perfect Blend of Memory and Storage

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3 min read/Sep 09, 2019

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NVDIMMs – A Perfect Blend of Memory and Storage

By VIP Expert

Tags: Verification Central, Verification IP, Verification

USB4 Is Here – USB-IF Ratifies USB4 specification

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1 min read/Sep 03, 2019

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USB4 Is Here – USB-IF Ratifies USB4 specification

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Ethernet TSN: A Boon for Automotive AVB Applications

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1 min read/Aug 26, 2019

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Ethernet TSN: A Boon for Automotive AVB Applications

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jun 27, 2019

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DisplayPort 2.0: 20Gbps, 16K & More

By VIP Expert

Tags: Verification Central, Verification IP, Verification

GDDR6 for AI, VR, and Autonomous Driving

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2 min read/Jun 24, 2019

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GDDR6 for AI, VR, and Autonomous Driving

By VIP Expert

Tags: Verification Central, Verification IP, Automotive, Verification

Optimizing AI, IoT & Automotive with LPDDR5

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2 min read/Jun 11, 2019

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Optimizing AI, IoT & Automotive with LPDDR5

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Signing off PCIe 5.0 Verification with Synopsys VIP

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2 min read/Jun 03, 2019

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Signing off PCIe 5.0 Verification with Synopsys VIP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

USB4: Higher Performance and Combined Data

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3 min read/Mar 19, 2019

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USB4: Higher Performance and Combined Data

By VIP Expert

Tags: Verification Central, Verification IP, Verification

DDR Generations: Memory Density and Speed

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4 min read/Feb 26, 2019

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DDR Generations: Memory Density and Speed

By VIP Expert

Tags: Verification Central, Verification

8k UHD Displays for Emerging Technologies

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2 min read/Feb 11, 2019

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8k UHD Displays for Emerging Technologies

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Dynamic HDR in HDMI 2.1 for TV and Mobiles

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3 min read/Jan 29, 2019

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Dynamic HDR in HDMI 2.1 for TV and Mobiles

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jan 28, 2019

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AIP+VIP Technology: Unveiling Its Comprehensive Benefits

By Synopsys Editorial Staff

Tags: Verification

Innovating Memory Standards with LPDDR5 IP & VIP

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1 min read/Nov 26, 2018

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Innovating Memory Standards with LPDDR5 IP & VIP

By VIP Expert

Tags: Verification Central, Verification IP, Verification

HDMI: How Scrambling Enables Higher Data Rates

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3 min read/Oct 31, 2018

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HDMI: How Scrambling Enables Higher Data Rates

By VIP Expert

Tags: Verification Central, Verification IP, Verification

PIPE 5.1.1 for PCIe 5.0, DP 1.4, USB 3.2, SATA

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4 min read/Oct 24, 2018

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PIPE 5.1.1 for PCIe 5.0, DP 1.4, USB 3.2, SATA

By VIP Expert

Tags: Verification Central, Verification IP, Verification

CCIX Over PCIe: Faster Coherent Interconnects

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2 min read/Oct 10, 2018

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CCIX Over PCIe: Faster Coherent Interconnects

By VIP Expert

Tags: Verification Central, Verification

High Res Displays for Mobile, TV, PC & Auto

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3 min read/Oct 03, 2018

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High Res Displays for Mobile, TV, PC & Auto

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jul 30, 2018

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PCIe 5.0 Demos: IP and VIP for AI

By VIP Expert

Tags: Verification Central, Verification IP, Verification

DFI 5.0 for Higher Performance in DDR5/LPDDR5 Systems

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3 min read/Jul 09, 2018

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DFI 5.0 for Higher Performance in DDR5/LPDDR5 Systems

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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3 min read/Jun 20, 2018

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The Future of Gaming Displays

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jun 19, 2018

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Managing Initial State in Formal Verification for Optimal Results

By Synopsys Editorial Staff

Tags: Verification, Formal Verification

Boost Debug Productivity of Serial Protocols

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3 min read/Jun 05, 2018

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Boost Debug Productivity of Serial Protocols

By VIP Expert

Tags: Verification Central, Verification IP, Verification

High Capacity and High Performance Flash Memory

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4 min read/May 21, 2018

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High Capacity and High Performance Flash Memory

By VIP Expert

Tags: Verification Central, Verification IP, Verification

10K Resolution at 120Hz Display with DSC 1.2

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2 min read/Apr 23, 2018

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10K Resolution at 120Hz Display with DSC 1.2

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Saving Power in Displays for Electronics

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3 min read/Apr 02, 2018

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Saving Power in Displays for Electronics

By VIP Expert

Tags: Verification Central, Verification IP, Verification

MIPI M-PHY 4.1 – Preventing Data Loss in High Speed Mobility Devices

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2 min read/Mar 27, 2018

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MIPI M-PHY 4.1 – Preventing Data Loss in High Speed Mobility Devices

By VIP Expert

Tags: Verification Central, Verification IP, Verification

HDMI 2.1: How it Became the Most Popular Display Interface

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2 min read/Mar 19, 2018

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HDMI 2.1: How it Became the Most Popular Display Interface

By VIP Expert

Tags: Verification Central, Verification

High Speed Memory in Smart Phones: MIPI UniPro v1.8

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4 min read/Mar 12, 2018

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High Speed Memory in Smart Phones: MIPI UniPro v1.8

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Overcoming USB Type-C Verification Challenges

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1 min read/Mar 06, 2018

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Overcoming USB Type-C Verification Challenges

By VIP Expert

Tags: Verification Central, Verification

MIPI CSI-2 v2.1 in Automotive, Drones and IoT

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2 min read/Feb 26, 2018

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MIPI CSI-2 v2.1 in Automotive, Drones and IoT

By VIP Expert

Tags: Verification Central, Automotive, Verification

LPDDR5 Upgrades: Boosting IoT, AI & Image Processing

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3 min read/Feb 21, 2018

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LPDDR5 Upgrades: Boosting IoT, AI & Image Processing

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Automated SoC Performance Verification: No More Bottlenecks

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1 min read/Feb 12, 2018

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Automated SoC Performance Verification: No More Bottlenecks

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Arm AMBA ACE5 and AXI5 Source Code Test Suite

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3 min read/Jan 29, 2018

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Arm AMBA ACE5 and AXI5 Source Code Test Suite

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Boost SoC Performance with PCIe PIPE 4.4.1

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1 min read/Jan 22, 2018

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Boost SoC Performance with PCIe PIPE 4.4.1

By VIP Expert

Tags: Verification Central, Verification IP, Verification

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2 min read/Jan 16, 2018

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Boost SoC Performance with PCIe PIPE 4.4.1

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Next Gen Memory Tech for Graphics, Networking & HPC

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3 min read/Jan 08, 2018

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Next Gen Memory Tech for Graphics, Networking & HPC

By VIP Expert

Tags: Verification Central, Verification IP, Verification

Maximizing Mobile Performance with LPDDR4 SoC RAM

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5 min read/Oct 02, 2017

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Maximizing Mobile Performance with LPDDR4 SoC RAM

By VIP Expert

Tags: Verification Central, Verification

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2 min read/Sep 29, 2017

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Essential Prototyping Building Blocks for Effective Design

By Tom De Schutter

Tags: Prototyping, Verification

Exploring USB Type-C Alternate Mode Universality

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2 min read/Sep 25, 2017

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Exploring USB Type-C Alternate Mode Universality

By VIP Expert

Tags: Verification Central, Verification

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1 min read/Aug 16, 2017

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Phalanx Strategy: Applying Greek Warfare Tactics to Formal Property Verification

By Synopsys Editorial Staff

Tags: Verification, Formal Verification

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3 min read/May 29, 2017

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Verification vs Validation: Understanding the Key Differences

By Tom De Schutter

Tags: Verification

HDMI 2.1: Channeling the GenX Audio Video Experience

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2 min read/Apr 25, 2017

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HDMI 2.1: Channeling the GenX Audio Video Experience

By Varun Agrawal

Tags: Verification IP, Consumer, Verification

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2 min read/Mar 07, 2017

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Software Modeling and KPI in Virtual Prototyping

By Synopsys Editorial Staff

Tags: Verification, Virtual Prototyping

BLOG

1 min read/Nov 10, 2016

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Virtual Prototyping: Fast, Accurate, and Standards-Based Approach

By Synopsys Editorial Staff

Tags: Verification

Mastering DDR-PHY Interoperability via DFI

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2 min read/Sep 05, 2016

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Mastering DDR-PHY Interoperability via DFI

By VIP Expert

Tags: Verification Central, Verification

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3 min read/Aug 23, 2016

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Understanding AMBA AXI Exclusive Access

By VIP Expert

Tags: Verification Central, Verification

Understanding PCIe Spread Spectrum Clocking

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4 min read/Dec 14, 2015

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Understanding PCIe Spread Spectrum Clocking

By VIP Expert

Tags: Verification Central, Verification

Understanding HDMI & HDCP 2.2 Authentication

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2 min read/Apr 20, 2015

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Understanding HDMI & HDCP 2.2 Authentication

By VIP Expert

Tags: Verification Central, Verification

Mastering UVM for Effective AXI VIP Usage

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4 min read/Mar 09, 2015

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Mastering UVM for Effective AXI VIP Usage

By VIP Expert

Tags: Verification Central, Verification

Optimizing PCIe PIPE Interface Power Management

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3 min read/Mar 02, 2015

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Optimizing PCIe PIPE Interface Power Management

By VIP Expert

Tags: Verification Central, Verification

Mastering UVM Register Model Simplification

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4 min read/Jan 05, 2015

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Mastering UVM Register Model Simplification

By VIP Expert

Tags: Verification Central, Verification

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