Cloud native EDA tools & pre-optimized hardware platforms
Hyperscale data centers need access to ultra-efficient interfaces to support multi-trillion parameter AI compute models. Synopsys’ UALink IP solution offers maximum throughput per lane at 200 Gbps, providing the performance needed to scale-up to 1,024 AI accelerator links. Consisting of controller, PHY, and verification IP, the complete UALink IP solution is engineered for data-intensive AI workloads offering low latency, high bandwidth, and advanced memory sharing capabilities. Built on decades of design experience in high-speed PCIe and Ethernet IP, Synopsys’ UALink IP reduces integration risk and speeds time to market for AI and HPC chip designers unleashing next-gen AI infrastructures.
Synopsys provides the industry’s broadest IP portfolio for HPC and AI, enabling designers with best-in-class IP interfaces so designers can speed time to market and achieve first pass silicon success.