Unified Emulation & Prototyping for Chip Development

Tom De Schutter

Oct 03, 2022 / 2 min read

Verifying and validating software and hardware has never been harder, given the continuous growth in complexity of both. This is why it’s not uncommon to see verification hardware being used 24/7. And even with 24/7 access, verification and software engineers can always benefit from having more verification hardware. Not only is there a constant need for additional systems to accelerate verification and validation tasks, changes in the number of parallel projects and the stage of each project makes it hard to have the right type of hardware for each use case.

For early hardware verification, the focus is on fast compile, easy bring-up, and full debug visibility. With software/hardware validation, on the other hand, the main need is highest performance. Up until now, engineers had to use their fixed emulation and prototyping hardware capacity to meet all tasks. This often means that the hardware isn’t optimized for the project and use case at a given moment in time. What if you can let your verification and software development requirements drive how and when to shift capacity between emulation and prototyping? In this blog post, you’ll learn how the Synopsys ZeBu® EP1 system is doing just that, and freeing users from the constraints of fixed hardware.

Synopsys ZeBu EP1 system

The Synopsys ZeBu EP1 system is the industry’s first unified emulation and prototyping system addressing verification requirements across the chip development cycle while offering the highest performance for both use cases. But how does Synopsys ZeBu EP1 offer this level of performance?  It starts by being built with Synopsys’ proven direct connect hardware architecture and using the software stacks from Synopsys’ market-leading ZeBu Server 4 and HAPS®-100 products.

Read on to learn more about how Synopsys ZeBu EP1, as a single hardware platform, is unlike alternative solutions that require two or even three hardware platforms to deliver everything you need to address verification requirements across the chip development cycle.

What If You Can Have Your Cake and Eat It Too?

During the early design verification phase, an easy-to-bring up emulation flow with full debug visibility and maximum emulation performance is needed. With Synopsys ZeBu EP1 customers have achieved as high as 19MHz emulation clock running their design, more than on any other emulator in the market. Moreover, the new faster compile technology in Synopsys ZeBu EP1 reduces compile time by up to 3x. Highest performance, fast compile, full debug visibility…what’s not to like?

Achieving 19MHz emulation clock is fantastic, but as we all know, software developers have an insatiable thirst for higher performance. By adding prototyping support, the same ZeBu EP1 system can also run at up to 100MHz prototyping clock. Booting an OS, developing drivers and firmware, and running real-world software scenarios on a pre-silicon target is no problem for the Synopsys ZeBu EP1 system.

As it turns out, this cake is rather sweet!

The Future of Verification Hardware is Now

We all have come to appreciate the unique benefits that come with emulation and prototyping systems. There is now finally a unique solution that offers flexible capacity without compromising on the benefits of each methodology. Synopsys ZeBu EP1 unified hardware system offers the fastest emulation and prototyping, along with 3x compile-time improvement, making it possible to run multiple compiles in a day.

Welcome to the future of verification hardware! A future in which the choice to emulate or prototype is yours at any time during the verification cycle. Don’t settle for a multi-hardware platform strategy and slow performance when a single hardware system delivers the fastest performance for both emulation and prototyping. Verifying and validating your designs just became a bit less daunting.

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