Synopsys Cloud
Cloud native EDA tools & pre-optimized hardware platforms
Request a Free Trial →
5G is driving tremendous increases in speed, bandwidth, and data throughput for mobile and automotive applications by introducing carrier aggregation, massive MIMO, and increased throughput with advanced modulation and high bandwidth channels via mmWave spectrums. This is adding a great deal of complexity to baseband, infrastructure, and application processor technologies, which has created the demand for new innovative IP to address this complexity. Synopsys’ DesignWare® IP portfolio provides trusted solutions from high-speed Analog Front-Ends, to proven interface IP in advanced FinFET technologies and processing solutions to meet the demands of the most advanced 5G chipset designs.
Read the white paper to learn more: How 5G is Influencing Silicon Design
Solutions
Complex Baseband Processing
Efficient and optimized processors increase work completed per cycle, reducing power
- ARC HSxD: Combined CPU+DSP architecture and multicore control operations; efficient interfacing to hardware accelerators
- ASIP Designer: Programmable, task-optimized cores/accelerators. Ultra-low power and size, high computation throughput
- ARC VPX: Wide SIMD/VLIW processor with ISA optimized for communications algorithms and machine learning
High-Speed AFE
Analog front-end delivers GHz channel bandwidth support at very low power. Modular 5G AFE supports:
- Different MIMO arrangements
- Processing of largest 5G channels and carrier aggregation
- Direct RF conversion for RFIC simplification
- Integration within SoC for lowest power and BOM cost
- High performance for processing high QAM requirements
- More than 300 designs for mobile and wireless
High-Performance, Trusted Interface IP
Available in 22-nm to 7-nm required for high-performance 5G designs
- MIPI CSI-2, DSI, and M-PHY offers high-speed serial interfaces between application/image processors & camera sensors
- LPPDR5/4/4X IP implements several low-power states with short exit latencies
- PCI Express 5.0/4.0 IP delivers high throughput for chip-to-chip communication
- Multi-Protocol PHYs deliver high-quality signal integrity and advanced power management capabilities for interfaces such as PCIe, CCIX, Ethernet and more
Security IP with a Hardware Root of Trust
Security protocol acceleration in a trusted environment:
- tRoot HSM provides a secure enclave in which to process sensitive data and operations for the SoC
- Security Protocol Accelerator (SPAcc) supports encryption and authentication
- High-Performance AES-XTS for Data-at-Rest encryption / decryption
Example Applications
5G Mobile Phones
Broad portfolio of IP solutions to address speed, bandwidth, and data throughput for 5G mobile applications
Learn More
Mobile Infrastructure
Innovative IP solutions to address the greater complexity of 5G infrastructure applications
Learn MoreResources
Blog
Blog
White Paper
