Sep 09, 2024/4 min read Synopsys Introduces Industry’s First 40G UCIe IP Solution to Power High-Performance Multi-Die Designs By Manuel Mota Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP
Aug 08, 2024/3 min read UCIe 2.0 - Setting the Tone for Chiplet Interoperability By Deepak Nagaria, Prasad Subudhi K. S, Narasimha Babu G V L Tags: Verification Central, Multi-Die System, Verification IP, Verification
Jun 17, 2024/3 min read Synopsys and Alchip Collaborate to Streamline the Path to Multi-die Success with Soft Chiplets By Manmeet Walia, Manuel Mota, Erez Shaizaf Tags: Multi-Die System, Chip Design Insights
Jun 12, 2024/5 min read GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package By Synopsys Editorial Staff, WeiHsun Liao Tags: Customer Spotlight, Multi-Die System, Chip Design Insights, Design, 3DIC Compiler
Apr 25, 2024/3 min read Want to Mix and Match Dies in a Single Package? UCIe Can Get You There By Michael Posner, Manuel Mota Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP
Mar 20, 2024/4 min read Faster, Higher Capacity Emulation and Prototyping for AI Workloads By Samskrut Konduru Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Emulation, Verification
Mar 15, 2024/8 min read Industry Leaders Discuss “Overcoming the Challenges of Multi-die Systems Verification” By Verification Expert Tags: Verification Central, Multi-Die System, Verification
Mar 06, 2024/5 min read Industry's First Verification IP for Arm AMBA CHI-G By Sudhanshu Rao Tags: Verification Central, Multi-Die System, Verification IP, Verification
Feb 22, 2024/ Synopsys AMBA CHI C2C System Verification Solutions By Venkatesh Kudumula Tags: Verification Central, Multi-Die System, Verification IP, Verification
Jan 23, 2024/4 min read Avoiding Multi-Die System Re-spins with New Early Architecture Exploration Technology By Kamal Desai Tags: Multi-Die System, Chip Design Insights, Design, Platform
Jan 22, 2024/5 min read Can 3DHI Meet the Demands of Aerospace and Government Applications? By Kenneth Larsen, Ian Land, Rob Aitken Tags: Multi-Die System, Aerospace & Government, Chip Design Insights, Design
Dec 20, 2023/8 min read 2023 in Review: AI Takes Center Stage in the Eternal Quest for Innovation By Synopsys Editorial Staff Tags: Cloud, Multi-Die System, Machine Learning, AI & Machine Learning, Chip Design Insights
Dec 14, 2023/4 min read Synopsys and Intel Team Up on the First UCIe-Connected Chiplet-Based Test Chip By Manuel Mota Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP
Dec 13, 2023/4 min read What’s Next for Multi-Die Systems in 2024? By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
Nov 21, 2023/5 min read How Photonics Can Light the Way for Higher Performing Multi-Die Systems By Kenneth Larsen, Twan Korthorst Tags: Multi-Die System, Chip Design Insights, Design, Photonic
Oct 11, 2023/7 min read Ensuring the Health and Reliability of Multi-Die Systems By Randy Fish, Yervant Zorian, Manuel Mota, Guy Cortez Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center
Oct 04, 2023/5 min read Industry Insights: How Collaboration Will Accelerate Adoption of Multi-Die Systems By Synopsys Editorial Staff Tags: Multi-Die System, Chip Design Insights
Sep 21, 2023/4 min read Samsung Foundry and Synopsys Accelerate Multi-Die System Design By Henry Sheng, Jennifer Pyon Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design
Sep 12, 2023/7 min read Five Key Techniques to Accelerate Software Bring-Up for Multi-Die Systems By Filip Thoen, Leonard Drucker, Vivek Prasad Tags: Multi-Die System, Chip Design Insights, Verification
Aug 22, 2023/4 min read Addressing Multi-Physics Effects for High-Performing Multi-Die Systems By Shekhar Kapoor, Kenneth Larsen Tags: Multi-Die System, Chip Design Insights, Design
Aug 03, 2023/8 min read Embracing Multi-Die Systems and Photonics for Aerospace and Government Applications By Jigesh Patel, Kenneth Larsen, Ian Land Tags: Multi-Die System, Aerospace & Government, Chip Design Insights, Photonic
Aug 01, 2023/5 min read Key Considerations for Addressing Multi-Die System Verification Challenges By Arturo Salz, Dr. Johannes Stahl Tags: Multi-Die System, Chip Design Insights, Verification
Jul 24, 2023/4 min read New Distributed Simulation Technology for Faster Simulation of Multi-Die Systems By Taruna Reddy Tags: Multi-Die System, Chip Design Insights, Verification
Jun 28, 2023/7 min read Developing the Blueprint for Multi-Die Systems with Virtual Prototyping Tools By Dr. Johannes Stahl, Tim Kogel Tags: Multi-Die System, Chip Design Insights, Verification, Virtual Prototyping
Jun 21, 2023/5 min read Designing Electrostatic Discharge (ESD) Protection for Monolithic SoCs and Multi-Die Systems By Dermott Lynch Tags: Multi-Die System, Chip Design Insights, Design, Design Technology Co-Optimization
Jun 13, 2023/4 min read Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads By Andy Tai, Ramesh Narayanaswamy Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification
May 23, 2023/5 min read How Multi-Die Systems Transform the Semiconductor Industry By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
May 22, 2023/4 min read Designing Thermal Management Solutions for Multi-Die Systems By Synopsys Editorial Staff Tags: Multi-Die System, Chip Design Insights
May 18, 2023/5 min read How Semiconductor Companies Use Multi-Die Systems By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
Apr 26, 2023/6 min read Celebrating the 76th Anniversary of the Transistor By Victor Moroz, Rob Aitken Tags: Multi-Die System, Chip Design Insights
Apr 25, 2023/7 min read Upgrading 3DIC Packaging for Faster AI Inference with PSMC By Kenneth Larsen Tags: Multi-Die System, Chip Design Insights, Design
Apr 13, 2023/5 min read SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World By Rob van Blommestein Tags: Multi-Die System, AI & Machine Learning, Silicon Lifecycle Management, Test, Chip Design Insights, Design, Verification, Inside Synopsys
Apr 11, 2023/4 min read UCIe Standard: Benefits & Requirements Explained By Manuel Mota Tags: Multi-Die System, Chip Design Insights, Interface IP, Silicon IP
Mar 31, 2023/4 min read Discovering the Future of Multi-Die Systems By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
Mar 17, 2023/4 min read UCIe PHY IP Tape-Out on TSMC N3E Process By Manuel Mota Tags: Multi-Die System, Chip Design Insights, Silicon IP
Feb 22, 2023/3 min read What are Multi-Die Systems? By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
Feb 07, 2023/5 min read Boosting Chip Design & Verification with AI EDA Tools By Shankar Krishnamoorthy Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Verification
Jan 19, 2023/4 min read How Systems of Chips Take Us From Smart to Smarter By Shankar Krishnamoorthy Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights
Jan 17, 2023/5 min read Why 2023 Holds Big Promise for Multi-Die Systems By Shekhar Kapoor, Michael Posner Tags: Multi-Die System, Chip Design Insights
Jan 03, 2023/6 min read 3 Key Technologies that Will Transform Electronic Design in 2023 By Sanjay Bali Tags: Cloud, Multi-Die System, Silicon Lifecycle Management, Chip Design Insights, Design, 3DIC Compiler
Dec 19, 2022/10 min read 2022's EDA & Chip Design Advancements By Synopsys Editorial Staff Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside Synopsys, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification
Aug 22, 2022/5 min read How 3DICs Are Sparking a New Wave of Product Innovation By Shekhar Kapoor Tags: Multi-Die System, Chip Design Insights
Jul 12, 2022/4 min read Enhancing Chip Verification with AI & Machine Learning By Rob van Blommestein Tags: Multi-Die System, Static Verification, AI & Machine Learning, Product Spotlight, Debug, Chip Design Insights, Simulation, HPC, Data Center, Verification, Formal Verification
Jul 11, 2022/5 min read What is a SmartNIC? By Rita Horner Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Security IP, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Compiler
Jun 16, 2022/6 min read Data Center Journey: Data Volume Growth & Moore's Law By Mike Gianfagna Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, 5G Wireless, HPC, Data Center
Feb 16, 2022/6 min read How to Design SoCs for the SysMoore Era By Dr. Ming Zhang Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, 3DIC Compiler
Dec 15, 2021/2 min read Hyper-Convergent Chip Designs: News & Trends By Synopsys Editorial Staff Tags: Multi-Die System, Chip Design Insights, Design, HPC, Data Center
Nov 29, 2021/4 min read What is Democratized Design? - Chip Design Process By Synopsys Editorial Staff Tags: Multi-Die System, Chip Design Insights, Design
Sep 14, 2021/5 min read High-Performance Computing Drives Demand for Chiplets By Kenneth Larsen Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, HPC, Data Center, Silicon IP
Aug 09, 2021/5 min read What is a Multi-Die Chip Design? By Kenneth Larsen, Manuel Mota Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, Silicon IP
Jul 13, 2021/5 min read 3DIC Design Optimization for Power, Performance & Area By Kenneth Larsen Tags: Multi-Die System, Chip Design Insights, Design
Jun 02, 2021/4 min read Die-to-Die Interfaces for Data Centers Bandwidth & Latency By Manuel Mota Tags: Multi-Die System, Chip Design Insights, Interface IP, HPC, Data Center, Silicon IP
Apr 20, 2021/3 min read Library Characterization Tool for Advanced Node SoC Design By Umang Doshi Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design, Signoff
Apr 19, 2021/5 min read PrimeSim Continuum's Enables IC Hyperconvergence By Tom Hsieh Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Chip Design Insights, Design
Apr 14, 2021/4 min read FPGA Prototyping Powers the SoC Design & Verification Process By Dr. Johannes Stahl Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Design, 5G Wireless, Verification
Apr 06, 2021/4 min read Integrated Chip Design Tools for IC Hyperconvergence By Raja Tabet, Anand Thiruvengadam Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Silicon IP
Mar 03, 2021/5 min read How 3DIC Design Tools Enhance Productivity & Performance By Shekhar Kapoor, Kenneth Larsen Tags: Multi-Die System, Chip Design Insights, Design, 3DIC Compiler
Nov 30, 2020/7 min read Die-to-Die Connectivity for High-Performance Computing By Scott Durrant Tags: Multi-Die System, Chip Design Insights, HPC, Data Center, Silicon IP
Oct 20, 2020/4 min read Defining the AI Era with the IBM Research AI Hardware Center By Arun Venkatachar Tags: Multi-Die System, AI & Machine Learning, Emulation, Interface IP, Virtual Prototyping, Chip Design Insights, Design, Manufacturing, Design Technology Co-Optimization, Processor Solutions, Silicon IP, Verification, 3DIC Compiler