Cloud native EDA tools & pre-optimized hardware platforms
10BASE-T1S specification is targeted for Automotive industry, developed with an objective to achieve collision free, deterministic transmission on a multi-drop network. Automotive applications require deterministic low-latency communication and do not need high data rates. 10BaseT1S protocol is used for sensor and actuator signaling. It allows the integration of diverse sensors into an automotive-Ethernet system and opens the door for new opportunities in Ethernet communication. The 10Base-T1S is a part of IEEE 802.3cg standard that supports data rates up to 10 Mbps over a single twisted pair for networks up to 25 meters.
10BASE-T1S |
25m |
10 Mbit, half duplex/full duplex |
It supports point-to-point and multidrop network topologies. The devices on a multidrop network share a common cable using the standard Ethernet carrier-sense, allowing multiple access with collision detection (CSMA/CD) methods and operates on PHY-Level Collision Avoidance (PLCA)
Figure 1: Connecting sensors and actuators onboard autonomous cars using Ethernet Communications
PLCA avoids physical collisions on the media, so that reception is never disrupted. It allows the utilization of the entire bandwidth of 10 Mbps and is used to achieve deterministic performance out of CSMA/CD for multidrop networks. The working principle of PLCA is to dynamically create transmit opportunities so that only one node (each node is assigned with a unique ID) is allowed to transmit at a time whilst the others wait for their opportunities.
Figure 2: A graphic representation of the Nodes on a 10BaseT1S Multidrop Shared Network
The Synopsys VIP for Ethernet is a suite of advanced verification components and data objects based on System Verilog – UVM compliant technology that can run in every major simulation environment. We are working closely with standard bodies and market makers to bring high quality VIPs, first to the market.
Synopsys VIP for Ethernet is natively integrated with the Synopsys Verdi® Protocol Analyzer debug solution as well as Synopsys Verdi® Performance Analyzer. Synopsys VIP can switch speed configurations dynamically at run time and includes an extensive and customizable set of frame generation and error injection capabilities.
Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. Synopsys transactors, memory models, hybrid and virtual solutions based on Synopsys IP enable various verification and validation use-cases on the industry’s fastest verification hardware, Synopsys ZeBu® emulation and Synopsys HAPS® prototyping systems.
For more information on Synopsys Ethernet VIP and Test Suite offerings, please visit http://synopsys.com/vip