Synopsys ARC® Classic Processor IP

Synopsys’ ARC® Classic processor IP portfolio includes processors based on the flexible and proven 32-/64-bit  ARCv2 and ARCv3 instruction set architecture (ISA) with features optimized for a broad range of embedded and deeply embedded applications, including functional safety support up to ASIL-D. It is complemented with ARC-based subsystems and software development tools.