BLOG 5 min read/ Aug 14, 2025 BLOG How AI is Revolutionizing Analog and Digital Node Migrations By Sumit Vishwakarma Tags: AI & Machine Learning, Custom Implementation, Physical Verification, Chip Design Insights, Design, Manufacturing, AMS Simulation, Physical Implementation, Design Technology Co-Optimization, Signoff, Verification, Analog Design
BLOG 3 min read/ May 09, 2024 BLOG CoreHW Develops 80GHz mmWave PLL with Synopsys RFIC Design Flow on GlobalFoundries 22FDX Technology By Jian Yang, Sween Kang Tags: Customer Spotlight, Custom Implementation, Chip Design Insights, Design
BLOG 6 min read/ Nov 02, 2023 BLOG Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum By Neel Gopalan Tags: Custom Implementation, Chip Design Insights, Design
BLOG 5 min read/ Aug 24, 2022 BLOG Why DTCO is Critical to Modern Memory Design Techniques By Anand Thiruvengadam, Ricardo Borges Tags: Custom Implementation, Chip Design Insights, Design, Design Technology Co-Optimization
BLOG 3 min read/ Jun 13, 2022 BLOG Fostering Engineering Education: Analog IC Design Contest By Srinivas Macha Tags: Custom Implementation, Chip Design Insights, Design, Inside Synopsys
BLOG 4 min read/ Sep 08, 2021 BLOG EDA Tools Help Students Build IC Design Skills By Synopsys Editorial Staff Tags: Custom Implementation, Physical Verification, Chip Design Insights, Design, Signoff, Inside Synopsys