About VC Formal Datapath Validation

CPU, GPU and AI designs are datapath heavy with unique design characteristics and require advanced verification techniques and methodology. These designs have mathematical functions like addition, subtraction, multiplier, square root and floating point units (FPU). Specialized AI-enabled processors excel at machine learning tasks and employ large arrays of arithmetic processing units including matrix multiplication and fused multiply-add structures. Verifying these mathematical functions using traditional methods is inefficient, time consuming and impractical.

The VC Formal Property Verification (FPV) App is designed to verify control paths (example arbiters, FIFOs, FSMs, bus bridges, etc.). The VC Formal Datapath Validation (DPV) App with integrated HECTOR™ technology contains custom optimizations and engines for datapath verification (ALU, FPU, DSP etc.).

Key Benefits

Learn About VC Formal Apps: Datapath Validation (DPV)
Synopsys VC Formal DPV app performs transactional equivalence checking between C-to-C, C-to-RTL, and RTL-to-RTL to ensure mathematical functions are implemented correctly according to spec.
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        Datapath Validation (DPV)

        Integrated HECTOR™ technology within VC Formal and contains custom optimizations and engines for datapath verification (ALU, FPU, DSP etc.) using transaction level equivalence. This app leverages the Verdi graphical user interface for debug.

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