Explore challenges and solutions in AI chip development
Connect with developers and decision-makers focused on PCI Express technology. Join Synopsys at the event to explore how Synopsys’ Complete IP Solution for PCI Express can accelerate your time-to-market. With over two decades of experience spanning seven generations of PCI Express, Synopsys IP offers a high-quality, low-risk solution for your next design.
End-to-End PCIe 6.x Interoperability with Switch Provider
Synopsys PCIe 7.0 IP extended Reach 40+db with ACC
Anritsu
GRL
Keysight
Samtec
Tektronix
Teledyne LeCroy
Viavi
PCI-SIG Architecture Overview
Richard Solomon, Principal Technical Product Manager, Synopsys | Wednesday, June 11 | 9:30 AM – 10:30 AM PT
L0p: Link Width Changes and Verification Challenges
Will Felten, R&D Architect, Synopsys | Wednesday, June 11 | 10:30 AM – 11:30 AM PT
Marketing Workgroup Panel: PCIe Technology Features Enabling Applications
Scott Knowlton, Sr. Director of Product Marketing, Synopsys | Wednesday, June 11 | 2:00 PM – 3:00 PM PT
FLIT Mode and Retry Verification: Pitfalls, Best Practices, and Solutions
Gaurav Manocha, Sr Staff Engineer for PCIe/CXL Transactor Development, Synopsys | Thursday, June 12 | 11:30 AM – 12:30 PM PT