Cloud native EDA tools & pre-optimized hardware platforms
This newsletter provides the latest information on Synopsys Photonic Solutions including product announcements, new papers, tech talks, upcoming events, and more.
March 26-28, 2024
San Diego Convention Center
Visit Synopsys Booth #3441
OFC is the largest international event for the latest advances in telecom and data center optics. The conference includes technical sessions, short courses, workshops, and panel discussions that focus on the newest research and developments as well as the latest applications. During the exhibition, Synopsys will demo its photonic design and high-speed Ethernet IP solutions.
Synopsys OptoCompiler 2023.12-SP1
With the introduction of a Base and Elite tier for OptoCompiler, we are enabling customers to carefully select the features they need for their PIC design projects. OptoCompiler Base targets layout-focused engineers who want to use an interactive, schematic driven layout environment with support for Python scripting. OptoCompiler Elite adds support for integrated simulation, advanced electrical routers, and in-design physical verification. For a full comparison and feature overview, please check with your support engineer or sales representative.
Constraint-based netlist solving in Python PyCells
This OptoCompiler release allows PDK developers and design engineers to easily create more complex and composite PyCells by creating devices and defining their connections or spatial relationships. The new netlist solver in the ‘optodesigner’ Python module resolves the final locations and orientations of constituent devices, making sure all devices abut seamlessly. The release supports back-annotation of the PyCell contents into hierarchical schematic views for post-layout simulation. This new PyCell capability is available in both OptoCompiler Base and Elite.
We previously added the ability to use Python to code your PCells for OptoCompiler and script designs. Now you can also create custom models for OptSim using Python.
A service release of the RSoft Photonic Device Tools, version 2023.12-SP1 is now available. This release includes:
For details about these and many other enhancements in this release, see the Photonic Solutions Release Notes on SolvNetPlus.
If you have any questions about features in this release, please contact photonics_support@synopsys.com.
At a device level, InP exceeds the performance of silicon as a material for photonics. However, where silicon photonics (the fabrication of ) shines is the extremely high levels of integration possible when compared to InP. This can lower the cost of the solution with lower power consumption. In addition, it takes advantage of the silicon infrastructure already established in foundries. The ability to test photonic circuits at wafer level is a huge cost benefit compared to InP based systems.
In 2022, GlobalFoundries announced the availability of GF Fotonix™ as a silicon photonics foundry solution. However, for a foundry to be successful, it needs to offer 4 solutions in addition to the customer relationship based on trust that the foundry will honor the customer IP and confidence that the foundry will deliver on its commitments. The 4 solutions are:
Technology Solution
The GF Fotonix™ technology is GlobalFoundries’s third generation of silicon photonics technology. The technology is unique in the industry in that it monolithically combines active (MZ Modulators, Ring Modulators and Photodiodes) and passive photonics devices (such as silicon and silicon nitride wave guides, MMI, Phase Shifter Rotators) along with a 45nm class RFCMOS technology on a 300mm SOI wafer. In addition to the photonic and electronic features, the technology includes features for 2D/2.5D integration (e.g. copper pillars and copper receive pads) and for “light in and light out” (e.g. v-groove based fiber couplers and capability for on-die laser attach).
Enablement solution
Process Design Kit
The technology is enabled by an electro-optic Process Design Kit (PDK) that is based on tools provided by industry leading EDA vendors such as Synopsys. The PDK supports parameterized cells (p-cells) of pre-characterized photonic and electronics devices to ease the complexity of photonic circuit design while enabling faster time to market. VerilogA models are provided for photonic devices while Spectre models are provided for electronic devices. These models are supported by Synopsys PrimeSim. The PDK also supports Synopsys Photonic Device Compiler and OptSim for custom model creation and simulation.
The PDK supports free-form designs using curvilinear shapes to provide customers with flexibility to innovate on photonic components (design must meet the technology design rules). Verification of free-form layouts can be performed using Synopsys’ IC Validator DRC and LVS for Curvilinear device Physical and Electrical Verification.
A reference electro-optical design flow using Synopsys tools is also provided by GF.
Standard Cell and Analog Library
The enablement also includes a standard cell digital library and analog circuits (such as general purpose Ios, temperature and voltage sensing circuits and eFuse controls).
Wafer Level Test
GF offers a unique on-wafer photonic device test capability called iLOTS (in-line optical test system). This capability allows for the collection of optical performance data that is statistically relevant and is used to determine wafer acceptance criteria.
Multi Project Wafer runs
To allow customers to exercise the technology, GF provides a GF Fotonix™ technology-based multi-project wafer run on a regular basis.
Manufacturing Solution
Products based on the GF Fotonix™ technology are currently manufactured in the Fab8 facility in Malta, NY alongside products based on GF’s FinFET technologies.
The process utilizes 45nm ground rules. Immersion lithography tools are used for certain patterning levels to optimize photonic components (waveguides, tapers, and other sub-wavelength features).
Roadmap Solution
The GF Fotonix™ technology is targeted towards inter/intra-data center and photonic compute applications with future extensions planned for ancillary markets such as sensing and LiDAR. The base technology supports O-band based 100G/λ solutions. Plans are in place to support 200G/λ solutions. Future packaging feature enhancements, such as support for thru-silicon vias (TSV), tighter v-groove pitches, tighter pitch CuP and CuRxPads. The technology will also serve as a platform for the heterogeneous integration of novel materials in the future.
Read blog entry
March 20-21, 2024
Santa Clara Convention Center, Santa Clara, CA
Highlight: Electro-Optic Co-Simulation of High-Speed Interconnects in Synopsys OptoCompiler
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Questions? We're happy to answer your technical questions about Synopsys Photonic Device Compiler, RSoft Photonic Device Tools, Synopsys OptSim, Synopsys OptoCompiler, and Synopsys OptoDesigner. Email us at photonics_support@synopsys.com.
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