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SNUG-GETS of Wisdom: Customer Testimonials on Synopsys Memory Solutions

Synopsys Editorial Staff

Jun 06, 2023 / 2 min read

What our customers say about Synopsys Memory Solutions:

Memory is everywhere and Synopsys is here to help you shift left for faster turnaround times with the industry’s most complete, end-to-end solutions for memory development.

Driving to Entitlement Yield in Foundry and TI Fabs with Synopsys Yield Explorer

Synopsys Yield Explorer (YE) has been used extensively by the Embedded Processing (EP) team at Texas Instruments. YE has been instrumental in identifying the sources of systematic yield loss in embedded memories within TI’s EP and AMS devices.

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Texas Instruments
David Francis, Embedded Product Engineer

"Yield Explorer or YE is a Synopsys software used to leverage not only scan diagnosis data but also memory fail data, bin data and physical design data to create an improved workflow for yield, customer returns and also quality."

To watch the full video, Synopsys customers can login here →

Ensuring memory IP robustness with PrimeSim Continuum's Sigma Amplification technology

Learn how Micron Technologies uses Synopsys PrimeSim Continuum solution’s Sigma Amplification technology to accelerate high sigma Monte Carlo analysis of their memory IP without compromising on accuracy.

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Micron
Raed Sabbah, Sr Staff Engineer

"We have included all the analysis in column one in the runtime for PrimeSim Sigma amplification versus the corresponding traditional runtime – all in hours. And over here, we show the speedup. We see significant speedup and it increases when we have more accuracy, or when we basically seek more accuracy such that we have a higher sigma or lower uncertainty."

To watch the full video, Synopsys customers can login here →

In-design Electrical Reporting Process for Samsung Foundry Advanced Nodes

Samsung reduced the design iterations for their custom design flow by performing the EM analysis with foundry-qualified signoff engines during layout. Customers are also adopting this solution in their design flows through DSK (Design Solution Kit).

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Samsung
Hyeri Park, Custom Design Methodology Team Member

"The new design flow allows us to identify and fix the potential EM issues which occur during the sign-off process in advance, and can reduce or completely eliminate the total number of design iterations."

To watch the full video, Synopsys customers can login here →,

In-Design Simulation - Partial Layout Extraction with Signoff Tools at Samsung Foundry

Kihoon Kim, Samsung shared how their design teams are speeding up analog design closure by catching potential electrical issues very early into the design cycle with Synopsys Custom Compiler’s innovative Partial Layout Extraction and Simulation flow.

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Samsung
Kihoon Kim, Electronic Foundry Division Engineer

"To avoid huge time for current full custom design flow, Samsung Foundry evaluated Synopsys’ Partial Layout Extraction Method using Samsung Foundry Advanced Node: 4,5, and 7 nm. Based on the evaluation results, Samsung Foundry will use the PLE method in AMS ecosystem, which could enhance the Samsung Foundry’s design infra... Samsung Foundry and Synopsys keeping tight collaboration for design infra reinforcement."

To watch the full video, Synopsys customers can login here →