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Synopsys IC Validator Videos
Synopsys IC Validator Videos
Discover the power of Synopsys IC Validator™ physical verification solution and stay up-to-date with the latest advancements. Join the thousands of designers and engineers who rely on Synopsys IC Validator to achieve reliable and robust IC designs.
Customer Testimonials
IBM’s experience with IC Validator DRC Explorer to achieve fastest DRC results
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IBM Experience Using ICV DRC Explorer
Juniper highlights IC Validator’s performance benefit: Overnight full chip DRC and LVS
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Juniper Experience IC Validator Full Chip Physical Verification
Nvidia’s experience with IC Validator for physical signoff of full-reticle GPU designs
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IC Validator - Nvidia Experience
Intel Uses Synopsys IC Validator to Meet Physical Verification Requirements
Intel’s Senior SoC Design Engineer, Matt Nichelson talks about the physical verification challenges his team faced and how Synopsys IC Validator™ helped to meet those challenges with significant results.
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Intel Uses Synopsys IC Validator to Meet Physical Verification Requirements
Nvidia Uses Synopsys IC Validator™ to Meet Aggressive Productivity Goals
Nvidia’s Senior Manager for Hardware Engineering, Ramulu Undevalli shares how he and his team used Synopsys IC Validator™ for physical verification and achieved significant time savings.
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Nvidia Uses Synopsys IC Validator™ to Meet Aggressive Productivity Goals
Rockley Photonics Silicon Photonics Verification with IC Validator
Learn about Rockley’ experience about using IC Validator physical signoff on Photonics IC designs. IC Validator helped to reduce physical verification cycle from weeks to days for the photonics applications.
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Rockley Photonics Experience using IC Validator for Silicon Photonics Verification
Barefoot Network’s Experience with IC Validator Physical Signoff on AWS Cloud
Learn about Barefoot Networks’ experience about using IC Validator physical signoff on Amazon Web Services Cloud. IC Validator scaling on the cloud delivers full chip DRC signoff within a day and 2-day runtime savings.
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Barefoot Network Experience Using IC Validator Full Chip DRC Signoff on AWS Cloud
Socionext shares their experience with IC Validator for excellent performance scalability
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IC Validator Performance Highlights by Socionext
Toshiba Highlights IC Validator Productivity Benefits: Overnight Full Chip Signoff, Faster DRC Closure
Learn about Toshiba’s experience using IC Validator physical signoff on ADAS chips. Toshiba achieves overnight full chip signoff and accelerates physical verification closure to less than a week.
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Toshiba Experience Using IC Validator Full Chip Signoff on ADAS Chips
IBM’s experience with IC Validator DRC Explorer to achieve fastest DRC results
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IBM Experience Using ICV DRC Explorer
Juniper highlights IC Validator’s performance benefit: Overnight full chip DRC and LVS
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Juniper Experience IC Validator Full Chip Physical Verification
Nvidia’s experience with IC Validator for physical signoff of full-reticle GPU designs
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IC Validator - Nvidia Experience
Intel Uses Synopsys IC Validator to Meet Physical Verification Requirements
Intel’s Senior SoC Design Engineer, Matt Nichelson talks about the physical verification challenges his team faced and how Synopsys IC Validator™ helped to meet those challenges with significant results.
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Intel Uses Synopsys IC Validator to Meet Physical Verification Requirements
Nvidia Uses Synopsys IC Validator™ to Meet Aggressive Productivity Goals
Nvidia’s Senior Manager for Hardware Engineering, Ramulu Undevalli shares how he and his team used Synopsys IC Validator™ for physical verification and achieved significant time savings.
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Nvidia Uses Synopsys IC Validator™ to Meet Aggressive Productivity Goals
Rockley Photonics Silicon Photonics Verification with IC Validator
Learn about Rockley’ experience about using IC Validator physical signoff on Photonics IC designs. IC Validator helped to reduce physical verification cycle from weeks to days for the photonics applications.
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Rockley Photonics Experience using IC Validator for Silicon Photonics Verification
Barefoot Network’s Experience with IC Validator Physical Signoff on AWS Cloud
Learn about Barefoot Networks’ experience about using IC Validator physical signoff on Amazon Web Services Cloud. IC Validator scaling on the cloud delivers full chip DRC signoff within a day and 2-day runtime savings.
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Barefoot Network Experience Using IC Validator Full Chip DRC Signoff on AWS Cloud
Socionext shares their experience with IC Validator for excellent performance scalability
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IC Validator Performance Highlights by Socionext
Toshiba Highlights IC Validator Productivity Benefits: Overnight Full Chip Signoff, Faster DRC Closure
Learn about Toshiba’s experience using IC Validator physical signoff on ADAS chips. Toshiba achieves overnight full chip signoff and accelerates physical verification closure to less than a week.
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Toshiba Experience Using IC Validator Full Chip Signoff on ADAS Chips
IBM’s experience with IC Validator DRC Explorer to achieve fastest DRC results
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IBM Experience Using ICV DRC Explorer
Juniper highlights IC Validator’s performance benefit: Overnight full chip DRC and LVS
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Juniper Experience IC Validator Full Chip Physical Verification
Nvidia’s experience with IC Validator for physical signoff of full-reticle GPU designs
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IC Validator - Nvidia Experience
Demo Videos
Our demo videos provide technical insights into the capabilities of Synopsys IC Validator, including its design rule checking, layout versus schematic (LVS) comparison, and Programmable Electrical Rule Checks (PERC) engine.
IC Validator DRC in the Cloud: Demo
Learn how to use IC Validator on the cloud to run DRC checking, scaling for faster performance, and elastic CPU management to add and remove CPUs on the fly.
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IC Validator DRC in the Cloud: Demo
IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
The IC Validator elastic CPU feature dynamically allocates resources during an IC Validator run. The host_elastic command automatically manages resources by adding/removing hosts as per run requirement and optimizes compute resource CPU utilization.
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IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
How To Use IC Validator Reference Methodology Flow for Physical Verification Automation
This video demonstrates how to execute different physical verification flows using Synopsys IC Validator Reference Methodology for faster signoff closure and ease-of-tool usage.
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How To Use IC Validator Reference Methodology Flow for Physical Verification Automation
IC Validator PERC VUE Demo – Part 1
In part 1-7 part series, we describe port & switch setup using the esd_setup.rs file & demonstrate how to setup a Synopsys IC Validator PERC run using the example script found in the Synopsys IC Validator installment directory.
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IC Validator PERC VUE Demo – Part 1
ICV PERC VUE Introduction - Topology Results
Overview of debugging a Topology based run with ICV PERC.
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IC Validator PERC VUE Demo – Part 2
IC Validator PERC VUE Demo – Part 3
Overview of debugging a Topology based run with ICV PERC.
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IC Validator PERC VUE Demo – Part 3
IC Validator PERC VUE Demo -Part 4
Overview of debugging a Current Density run using ICV PERC VUE.
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IC Validator PERC VUE Demo – Part 4
IC Validator PERC VUE Demo - Part 5
Overview of debugging a Point-to-Point Resistance run using ICV PERC VUE.
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IC Validator PERC VUE Demo – Part 5
IC Validator PERC VUE Demo -Part 6
In part 6 of this 7-part series, we will introduce how to use Synopsys LVS Explorer with IC Validator PERC to quickly identify potential issues caused by LVS extraction. This is an introduction that shows what commands can be used to run this and t
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IC Validator PERC VUE Demo – Part 6
IC Validator PERC VUE Demo - Part 7
In the final installment of this 7 part series, we will introduce how to search and filter errors using the search pane in the Synopsys IC Validator PERC VUE.
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IC Validator PERC VUE Demo – Part 7
IC Validator DRC in the Cloud: Demo
Learn how to use IC Validator on the cloud to run DRC checking, scaling for faster performance, and elastic CPU management to add and remove CPUs on the fly.
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IC Validator DRC in the Cloud: Demo
IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
The IC Validator elastic CPU feature dynamically allocates resources during an IC Validator run. The host_elastic command automatically manages resources by adding/removing hosts as per run requirement and optimizes compute resource CPU utilization.
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IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
How To Use IC Validator Reference Methodology Flow for Physical Verification Automation
This video demonstrates how to execute different physical verification flows using Synopsys IC Validator Reference Methodology for faster signoff closure and ease-of-tool usage.
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How To Use IC Validator Reference Methodology Flow for Physical Verification Automation
IC Validator PERC VUE Demo – Part 1
In part 1-7 part series, we describe port & switch setup using the esd_setup.rs file & demonstrate how to setup a Synopsys IC Validator PERC run using the example script found in the Synopsys IC Validator installment directory.
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IC Validator PERC VUE Demo – Part 1
ICV PERC VUE Introduction - Topology Results
Overview of debugging a Topology based run with ICV PERC.
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IC Validator PERC VUE Demo – Part 2
IC Validator PERC VUE Demo – Part 3
Overview of debugging a Topology based run with ICV PERC.
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IC Validator PERC VUE Demo – Part 3
IC Validator PERC VUE Demo -Part 4
Overview of debugging a Current Density run using ICV PERC VUE.
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IC Validator PERC VUE Demo – Part 4
IC Validator PERC VUE Demo - Part 5
Overview of debugging a Point-to-Point Resistance run using ICV PERC VUE.
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IC Validator PERC VUE Demo – Part 5
IC Validator PERC VUE Demo -Part 6
In part 6 of this 7-part series, we will introduce how to use Synopsys LVS Explorer with IC Validator PERC to quickly identify potential issues caused by LVS extraction. This is an introduction that shows what commands can be used to run this and t
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IC Validator PERC VUE Demo – Part 6
IC Validator PERC VUE Demo - Part 7
In the final installment of this 7 part series, we will introduce how to search and filter errors using the search pane in the Synopsys IC Validator PERC VUE.
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IC Validator PERC VUE Demo – Part 7
IC Validator DRC in the Cloud: Demo
Learn how to use IC Validator on the cloud to run DRC checking, scaling for faster performance, and elastic CPU management to add and remove CPUs on the fly.
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IC Validator DRC in the Cloud: Demo
IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
The IC Validator elastic CPU feature dynamically allocates resources during an IC Validator run. The host_elastic command automatically manages resources by adding/removing hosts as per run requirement and optimizes compute resource CPU utilization.
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IC Validator Dynamic Resource Allocation For Efficient Compute Resource Usage
Thought Leadership Videos
A Discussion with Cerebras Systems
Listen to an insightful discussion between Synopsys and Cerebras Systems on the challenges facing physical verification and how to address them.
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Thought Leadership Podcast: A Discussion with Cerebras Systems
Listen to an insightful discussion between Synopsys and Cerebras Systems on the challenges facing physical verification and how to address them.
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