Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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448G: Ready or not, here it comes!
Date: Jul 22, 2025 | 10:00 AM PDT
Featured Speakers:
- Priyank Shukla, Director of Product Management, Synopsys
- Kent Lusted, Distinguished Architect, Synopsys
Why You Should Attend:
- Understand Industry Readiness: Explore the challenges and opportunities in the race to 448G SerDes and assess if the industry is prepared for this leap in high-speed serial interfaces.
- Learn About Emerging Standards: Gain insights into the latest advancements in standards shaping the future of 448G SerDes technology.
- Discover Next-Gen Channel Designs: Dive into cutting-edge electro/optical channel designs that will enable high-speed data transmission.
- Explore Advanced Modulation Schemes: Understand the innovative modulation techniques driving the performance of 448G links.
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Featured Speakers
Priyank Shukla
Director of Product Management, Synopsys
Priyank Shukla, Director of Product Management at Synopsys, leads High-Speed IP deployment in compute SoCs. He is an IEEE802.3 voter, IIT Madras graduate, patent holder, and two-time DesignCon best paper award winner.
Kent Lusted
Distinguished Architect, Synopsys
Kent is a Distinguished Architect at Synopsys with over 14 years of leadership in Ethernet standards development and 30+ years at Intel, where he earned an Intel Achievement Award for pioneering Gigabit Ethernet controllers.