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Design Centric Yield Management
Nanometer node product ramp issues are dominated by design-process-test interactions, mandating cross-domain analyses to mitigate these issues rapidly. Yield Explorer brings yield relevant data from diverse sources such as physical design flow, wafer manufacturing, and wafer and chip level testing into a single data bank.
Analysis of Yield Limitations
A complement to the Synopsys TestMAX diagnostics solution, Yield Explorer is a timely answer to the complex challenges faced by today’s product engineering teams. With the widest possible range of data at their disposal, users achieve unsurpassed clarity in root cause analysis when faced with systematic design-related yield limiters. Correlating output from ATE test to wafer parametric data on one side, and DRC flags or timing distribution on the other, is now easily possible. Yet Yield Explorer achieves this with an order of magnitude advantage in analysis speed in the most complex of use cases - for example, 10X faster volume diagnostics analysis of ATPG output.
Key Features
- Complex correlations across site-parametric, design, physical verification, simulation, product test and custom data sources
- Synchronized Component Architecture integrates all incoming data into a single, coherent analysis
- Charts and spreadsheets interact with wafer maps and failing net overlays onto design
- Dynamically extendable data model permits any number of custom data fields to be loaded into the Yield Explorer database
- Platform neutral Analysis Client (Windows, Linux, UNIX) allows all users to use the same application regardless of desktop computing environment.