Reducing Energy Consumption: Sustainable Chip Design

Synopsys Editorial Staff

Apr 21, 2023 / 3 min read

As automated technology becomes more sophisticated, the amount of energy needed to power it increases; striking a balance between technological advancement and energy consumption is critical (on Earth Day and the whole year long!).

We are making progress. But there is much more to do.

First, some context: global energy consumption has risen sevenfold since 1952, driven in part by the shift to hyperscale data centers. In 2021, these accounted for between 220 to 330 Terawatt hours (TWh), or 0.9% and 1.3% of global final electricity demand, which is more energy than some countries consume in a year.

At the same time, technology can help reduce energy consumption, and together with environmentally responsible practices across the chip supply chain, we can make progress to reduce the environmental impact of technology.

Linhai Kuocangshan wind farm is the largest wind farm in East China

How Tech Is Being Deployed as a Sustainability Tool

As mentioned before, technology can be both a hindrance and a great help to our environment. While training a single AI model can consume the energy equivalent of multiple U.S. households' annual footprint, it can also be deployed to identify powerful ways to conserve energy.

As an enabler of world-leading chip innovation, Synopsys tools use the power of AI to champion environmentally friendly chip design.

Synopsys™ (Design Space Optimization AI) is our flagship chip-design application with billions of potential chip design optimizations, utilizing reinforcement learning to reduce energy consumption and enhance performance. And the results are in. Last year, our customers reported a 25% reduction in turnaround time and compute resources and up to 30% power reduction.

Holistic SoC Thinking

The approach to electronics system design from day one can make a big difference to energy consumption. Energy-efficient SoCs are already a central consideration across sectors from data centers to wearable technology, automotive and aerospace, and wired applications for high-performance computing (HPC).

A chip’s energy consumption has a direct impact on a product’s ultimate carbon footprint and affects everything from battery life to cooling and heat-dissipation costs. Applying low-power techniques across the design process is essential. This means thinking holistically from software to architecture, register-transfer level (RTL), implementation, signoff and verification, and using the former to its full potential.

For instance, in terms of architecture, dynamic voltage and frequency scaling (DVFS) combined with power-performance tradeoffs have resulted in power savings of between 30% and 50%. In RTL, micro-architectural tradeoffs and the ability to fix power blocks can lead to savings between 15% and 30%. And in the implementation phase, automatic optimization can help reduce power usage by 10% to 15%. It all adds up.

Synopsys supports this journey toward energy efficiency with an end-to-end solution for energy-efficient SoCs across design, verification, and IP products. In the design phase, virtual-prototyping software empowers system architects to tune for low power. A low-power verification solution can then ensure the design meets its functional coverage goals. Finally, the Synopsys Interface, Foundation and Processor IP portfolio allows designers to maximize energy efficiency and performance by incorporating the most advanced low-power functionalities into their SoCs.

In parallel to SoCs, demand for multi-die systems is increasing as they help address the challenges of systemic complexity as Moore’s law slows. While their makeup and purpose are distinct, the need for end-to-end thinking that factors in energy efficiency is the same. If anything, the need for a holistic approach is even more pronounced, as multi-die systems require teams to work together to analyze variables such as power consumption, heat dissipation, signal integrity, and proximity effects in relation to each other. Here again, Synopsys is supporting responsible innovation with our Multi-Die System Solution for optimized power and performance.

Positive Change Beyond Chips

Optimizing chip design for energy efficiency is of course just one piece of the carbon-reduction puzzle for the broader industry. In terms of silicon technology, using energy-efficient materials such as silicon carbide, technologies such as silicon photonics, and transistor devices such as FinFETs can help optimize and reduce energy consumption. And there is plenty of opportunity for wider adoption of renewable energy sources. Data centers can greatly reduce their footprint by locating near solar and wind energy sources and harnessing them. Encouragingly, major hyperscale data centers are already on the way to using carbon-free energy to power their operations.

Sustainable measures are also necessary across supply chain operations, from the design process and electronic automation design solutions to IP, fabrication, and packaging.

This Earth Day is a chance to reflect on why we innovate. As an enabler of Smart Everything, at Synopsys, we believe that the future is not smart unless it is sustainable, just, and secure. This mindset guides everything we do and is critical for us to collectively benefit from the technological progress that we all work so hard to achieve.

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