Cloud native EDA tools & pre-optimized hardware platforms
Propelled by the demand for more advanced chips, the European semiconductor industry is making significant strides in funding, infrastructure, and talent initiatives. From the European Chips Act funding workforce development programs to EUROPRACTICE providing reasonably priced resources to academia and industry, equipping an engineering workforce with the necessary technology to develop new integrated circuits (ICs) is critical.
Imec, a world-leading research and innovation center in nanoelectronics and digital markets, is removing obstacles for academia and industry to access the most advanced semiconductor design technologies. Over the years, Synopsys has collaborated with imec on numerous developments, including 3D IC technologies and technology computer-aided design (TCAD), with the goal of transforming the industry.
To enable integrated circuits design platform, imec has been contributing to the chip ecosystem by distributing process design kits (PDKs). PDKs model a fabrication process for the design tools used and enable the design of integrated circuits using a certain technology variation for the foundry processes.
Similar to a set of building blocks, PDKs are helping more academics and designers learn how to create an advanced node chip, positively impacting various industries like consumer electronics, automotive, health care, and artificial intelligence by educating the future workforce in Europe and worldwide.
In this era of Smart Everything, the need for smaller, faster, and more efficient chips is skyrocketing. The advent of 2nm technology, with its increased performance, reduced power consumption, and higher transistor density, will bring a new era of more powerful chips, fueling smartphones, computers, self-driving cars, and more.
While 2nm comes with many benefits, it also brings greater complexity. PDKs are critical to overcome 2nm’s unique challenges, but previously, there had yet to be an open-source PDK or university training for 2nm technology. This has made it difficult for academia and those who are unable to go down the full commercial route to engage in advanced research — until now.
In February 2024, imec launched its design pathfinding PDK to provide broad access to advanced nodes for design pathfinding, system research, and training. Imec’s N2 (2nm) PDK not only gives academia and industry the ability to transition their products into next-generation technologies through design pathfinding but also paves the way for training the semiconductor experts of tomorrow.
Synopsys’ collaboration with imec delivers a certified, AI-driven electronic design automation (EDA) digital design flow and a comprehensive, tool-compatible N2 PDK that enables chip designers to prototype and accelerate using a virtual PDK-based design environment. The Synopsys EDA tool suite, including our Fusion Compiler-based design flow, combined with this comprehensive N2 PDK and the accompanying training program with EUROPRACTICE offers hands-on training for leading edge SoC design.
Foundry PDKs give chip designers access to a library of tested and proven components to deliver functional and reliable design and are usually available after the technology reaches a critical level of manufacturability. However, they are generally restricted regarding who can use them and are under strict NDAs from foundries, creating an even higher threshold for academia and industry to access advanced technology nodes during their development.
Imec’s N2 pathfinding PDK is available to universities, startups, and SMEs who want to engage in advanced research, opening a world of experimentation and design possibilities. Specifically, the PDK encompasses a robust suite of design resources essential for developing next-generation ICs, including detailed electrical and physical specifications of the N2 node technology as well as disruptive features like nanosheet devices and backside power grids that have previously been restricted to major foundries.
Our collaboration with imec on the N2 PDK helps facilitate the design process, minimize operational costs, and elevate the quality of IC designs to accelerate semiconductor innovation. The toolkit and training program are already attracting several universities and industry players alike, and Synopsys is eager to continue working with imec to expand the PDK to more technology nodes beyond N2 and across other regions.
Beyond creating the comprehensive, tool-compatible PDK from scratch, Synopsys played a role in enabling imec to create an industry-standard 2nm-Design Rule Manual (DRM). Synopsys also trained imec engineers to further spread our methodologies for implementing leading-edge SoCs on our Reference Methodology (RM), enabling imec to scale its PDK to numerous universities and migrate its PDK validation flows to newer technology nodes.
More importantly, this collaboration is a significant step forward, demonstrating how industry partnerships can broaden access to advanced semiconductor design technology for the current and next generation of engineers. In fact, Synopsys Academic & Research Alliances (SARA) is spearheading this effort in Europe and other regions around the world, collaborating closely with universities on workforce development activities and partnering with companies like imec on creating new opportunities for innovation.
We are excited about the potential for learning and innovation this milestone brings, as it helps more engineers become familiar with our tools and expertise in 2nm technology and design flow, allows for future collaborations on other imec technologies, and strengthens our European workforce for future generations.